search for: printinstruction

Hi, LLVMers, I notice that there are two versions of printInstruction() generated by tablegen: (1) XXXInstPrinter::printInstruction(const MCInst *MI, raw_ostream &os), like for X86. (2) XXXAsmPrinter::printInstruction(const MachineInstr *MI, raw_ostream &os), like for Sparc. I guess Sparc backend directly transform MachineInstr objects into ostream, while X...

...IN_FLOAT_H /ISTLport-4.6.2\stlport /Illvm\inc lude /Itablegen_includes /c llvm\lib\Target\X86\X86AsmPrinter.cpp /Fobuild_vc71\lib\Target\X86\X86AsmPrinter.obj X86AsmPrinter.cpp tablegen_includes\X86GenIntelAsmWriter.inc(15) : error C2888: 'bool `anonymous-namespace'::X86IntelAsmPrinter::printInstruction(const llvm::MachineInstr *)' : symbol cannot be defined within namespace 'llvm' llvm\lib\Target\X86\X86AsmPrinter.cpp(364) : error C2264: '`anonymous-namespace'::X86IntelAsmPrinter::printInstruction' : error in function definition or declaration; function not called table...

struct X86AsmPrinter is in an anonymous namespace, but printInstruction is declared in namespace llvm. try editing the tablegen output to move X86AsmPrinter::printInstruction into an anonymous namespace, not llvm. I suspect this will at least fix the first problem. Then we can figure out the proper longterm fix. Andrew On Tue, 2004-10-12 at 03:56, Paolo Invernizzi...

...nto an MCInst. 4. AsmPrint the MCInst to the ".s file" output. Daniel will be working on #1 soon, #2 is basically a heavily refactored version of X86CodeEmitter.cpp:emitInstruction, #3 will be contributed soon by Sean, and #4 is basically a heavily refactored version of asmprinter:printInstruction (which I'm working on). A strong goal for me is to make it so that we can build very small (as in code size) assembler and disassembler tools. This means that none of this stuff can depend on (e.g.) libx86, because that brings in the huge target plus libcodegen plus libtarget plus vmcor...

Can someone explain what MCInst is vs. MachineIntr? I'm porting some patches we have here that affect MachineInstrs and am wondering whether I need to make similar changes in MCInst. Why do we have two machine instruction representations? -Dave

...rmediate language is close to an assembly language (RTL, 1 operation per line), so I based my target off of the Mips target. However, the intermediate language i'm targetting does not support tabs before the instructions. I've looked through the files and found that the tab comes from the printInstruction() method, which is generated when compiling. Directly after all of the tables it generates, it produces this line: O << "\t"; (O is the output stream) Since its in the generated code, I've been looking through the .td files, but haven't had any luck. How can I prevent thi...

...orkspace/llvm/include/llvm/MC/MCInst.h:182:0 #11 0x00000000026695fd llvm::X86ATTInstPrinter::printOperand(llvm::MCInst const*, unsigned int, llvm::raw_ostream&) /home/shenyouren/workspace/llvm/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp:185:0 #12 0x0000000002664c06 llvm::X86ATTInstPrinter::printInstruction(llvm::MCInst const*, llvm::raw_ostream&) /home/shenyouren/workspace/build-llvm/lib/Target/X86/X86GenAsmWriter.inc:48204:0 #13 0x0000000002668edc llvm::X86ATTInstPrinter::printInst(llvm::MCInst const*, llvm::raw_ostream&, llvm::StringRef, llvm::MCSubtargetInfo const&) /home/shenyouren/wo...

...0x00000001096a5811 __assert_rtn + 81 7 llvm-mc 0x000000010963f4e8 llvm::SparcInstPrinter::printOperand(llvm::MCInst const*, int, llvm::MCSubtargetInfo const&, llvm::raw_ostream&) + 136 8 llvm-mc 0x000000010963eae0 llvm::SparcInstPrinter::printInstruction(llvm::MCInst const*, llvm::MCSubtargetInfo const&, llvm::raw_ostream&) + 256 9 llvm-mc 0x000000010964f5e6 llvm::SparcInstPrinter::printInst(llvm::MCInst const*, llvm::raw_ostream&, llvm::StringRef, llvm::MCSubtargetInfo const&) + 86 10 llvm-mc 0x00...

On Friday 10 July 2009 00:19, Chris Lattner wrote: > asmprinter::printInstruction will lower a MachineInstr to an MCInst, > then call the MCInst asmprinter to do the hard formatting work. You > can see a horrible simple skeleton of this idea in > X86ATTAsmPrinter::printMachineInstruction. Yep, that's where I hit the problem. I'm patching the sources for the c...

...M. I'm having a hard time figuring out the relationship between my XXXAsmPrinter and MCAsmStreamer. Can someone explain what each is responsible for? Looking at the existing targets, the XXXAsmPrinter implementations seem to implement both the legacy "create a .s file" behavior, using printInstruction/printOperand/etc as well as the newer "lower to MCInst" behavior (EmitInstruction). Is this just a remnant of the v2.x -> v3.x transition? AFAICT, the MCAsmStreamer should be the interface to create the .s file going forward. Is that true? If true, how does it fit into registering the...

...close to an assembly language (RTL, 1 > operation per line), so I based my target off of the Mips target. However, > the intermediate language i'm targetting does not support tabs before the > instructions. I've looked through the files and found that the tab comes > from the printInstruction() method, which is generated when compiling. > > Directly after all of the tables it generates, it produces this line: > O << "\t"; > > (O is the output stream) > > Since its in the generated code, I've been looking through the .td files, > but haven'...

....b9f78a5 100644 --- a/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp +++ b/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp @@ -39,7 +39,8 @@ void X86IntelInstPrinter::printInst(const MCInst *MI, raw_ostream &OS, if (TSFlags & X86II::LOCK) OS << "\tlock\n"; - printInstruction(MI, OS); + if (!printAliasInstr(MI, OS)) + printInstruction(MI, OS); // Next always print the annotation. printAnnotation(OS, Annot); -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20130917/5dab3f16...

...{ let Namespace = "ARM"; dag OperandList = ops; let AsmString = asmstr; let Pattern = pattern; } and defined three instructions (ldr, str, and mov). The problem is that, in the generated code, the namespace isn't used everywhere I expected. For example, in ARMAsmPrinter::printInstruction, the PHI instruction doesn't has an "ARM::" prepended to it. ldr, str and mov have. An ARM namespace is also missing in ARMGenInstrNames.inc. Someone with more experience with tablegen knows why it isn't adding these namesaces to the generated code? Thanks, Rafael

Hi I am not a good programmer but for my project i have to use llvm to generate CFG for c programs where i have a mapping from IR instruction in CFG to their respective c instruction. After surfing a in source of llvm i did the following change in printInstruction() function in llvm/lib/VMCore/AsmWriter.cpp file. .....void AssemblyWriter::printInstruction(const Instruction &I) { if (AnnotationWriter) AnnotationWriter->emitInstructionAnnot(&I, Out); // Print out indentation for an instruction. Out << " "; if (MDNode *N...

Hi. I want to do a cutomized points-to analysis on IR. Suppose that we have: *%91 = bitcast i8* %90 to %struct.demux_packet*, !dbg !2688* I want to store sth similar to %91 -> target of %90, which records the target of pointer named %91. How can I access the names (Here, %90 and %91)? I know that I can put the whole line for an instruction into a string, using the following code: *string str;*

...rmediate language is close to an assembly language (RTL, 1 operation per line), so I based my target off of the Mips target. However, the intermediate language i'm targetting does not support tabs before the instructions. I've looked through the files and found that the tab comes from the printInstruction() method, which is generated when compiling. Directly after all of the tables it generates, it produces this line: O << "\t"; (O is the output stream) Since its in the generated code, I've been looking through the .td files, but haven't had any luck. How can I prevent thi...

..._rtn + 81 >> 7 llvm-mc 0x000000010963f4e8 >> llvm::SparcInstPrinter::printOperand(llvm::MCInst const*, int, >> llvm::MCSubtargetInfo const&, llvm::raw_ostream&) + 136 >> 8 llvm-mc 0x000000010963eae0 >> llvm::SparcInstPrinter::printInstruction(llvm::MCInst const*, >> llvm::MCSubtargetInfo const&, llvm::raw_ostream&) + 256 >> 9 llvm-mc 0x000000010964f5e6 >> llvm::SparcInstPrinter::printInst(llvm::MCInst const*, llvm::raw_ostream&, >> llvm::StringRef, llvm::MCSubtargetInfo const&) +...

...printBasicBlockLabel(I, true); // Overridden for each target O << '\n'; } for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end(); II != E; ++II) { // Print the assembly for the instruction. O << "\t"; printInstruction(II); // Overridden for each target postInstructionAction(II); // New API for comment printing, etc. O << "\n"; ++EmittedInsts; } } } Then TableGen wouldn't have to worry about printing newlines either. The best thing is that parts of postInstructionAc...

...001096a5811 __assert_rtn + 81 > 7 llvm-mc 0x000000010963f4e8 > llvm::SparcInstPrinter::printOperand(llvm::MCInst const*, int, > llvm::MCSubtargetInfo const&, llvm::raw_ostream&) + 136 > 8 llvm-mc 0x000000010963eae0 > llvm::SparcInstPrinter::printInstruction(llvm::MCInst const*, > llvm::MCSubtargetInfo const&, llvm::raw_ostream&) + 256 > 9 llvm-mc 0x000000010964f5e6 > llvm::SparcInstPrinter::printInst(llvm::MCInst const*, llvm::raw_ostream&, > llvm::StringRef, llvm::MCSubtargetInfo const&) + 86 > 10 llvm...

...t; 7 llvm-mc 0x000000010963f4e8 >>> llvm::SparcInstPrinter::printOperand(llvm::MCInst const*, int, >>> llvm::MCSubtargetInfo const&, llvm::raw_ostream&) + 136 >>> 8 llvm-mc 0x000000010963eae0 >>> llvm::SparcInstPrinter::printInstruction(llvm::MCInst const*, >>> llvm::MCSubtargetInfo const&, llvm::raw_ostream&) + 256 >>> 9 llvm-mc 0x000000010964f5e6 >>> llvm::SparcInstPrinter::printInst(llvm::MCInst const*, llvm::raw_ostream&, >>> llvm::StringRef, llvm::MCSubtargetIn...