search for: printasmoperand

Displaying 7 results from an estimated 7 matches for "printasmoperand".

2011 Mar 01
2
[LLVMdev] Sub registers in inline assembly
I was wondering if llvm supports sub registers in an inline asm string. For example, in gcc, using modifiers %w0 makes it possible to access ax if %0 refers to eax. If there is any support, do you know where it is implemented ? I'd like to add such a support for another target. Thank you ! Damien -------------- next part -------------- An HTML attachment was scrubbed... URL:
2011 Mar 01
0
[LLVMdev] Sub registers in inline assembly
...it possible to access ax if %0 refers to eax. > > If there is any support, do you know where it is implemented ? I'd like to add such a support for another target. Hi Damien, It sure does. These are considered "modifier" characters and are handled in (e.g.) X86AsmPrinter::PrintAsmOperand. You can send some C code with asms in it through x86 clang to see what IR it generates or use the llvm demo page. -Chris
2018 Feb 07
2
retpoline mitigation and 6.0
...r &P, const MachineOperand &MO, break; } - O << '%' << X86ATTInstPrinter::getRegisterName(Reg); + if (emit_pct) + O << '%'; + + O << X86ATTInstPrinter::getRegisterName(Reg); return false; } @@ -464,6 +472,7 @@ bool X86AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, case 'w': // Print HImode register case 'k': // Print SImode register case 'q': // Print DImode register + case 'V': // Print native register without '%' if (MO.isReg()) return printAsmM...
2018 Feb 07
0
retpoline mitigation and 6.0
...> } > > - O << '%' << X86ATTInstPrinter::getRegisterName(Reg); > + if (emit_pct) > + O << '%'; > + > + O << X86ATTInstPrinter::getRegisterName(Reg); > return false; > } > > @@ -464,6 +472,7 @@ bool X86AsmPrinter::PrintAsmOperand(const MachineInstr > *MI, unsigned OpNo, > case 'w': // Print HImode register > case 'k': // Print SImode register > case 'q': // Print DImode register > + case 'V': // Print native register without '%' > if (MO.isRe...
2018 Feb 07
0
retpoline mitigation and 6.0
On Wed, 2018-02-07 at 13:16 -0800, Guenter Roeck wrote: > Here are my exact versions: >     llvm: 3afd566557f3 ("AMDGPU: Add 32-bit constant address space") >     clang: 848874aed95a ("[clang-format] Fix ObjC message arguments formatting.") OK, mine are slightly newer than that now, but I now get a working 64- bit defconfig build. It'll still break with any PV
2014 Jan 10
8
[LLVMdev] All backends now use the MC asm printer
In r198030 the last in tree backend was converted to use MCInst for printing assembly. I removed support for the old printer in r198959. Out of tree targets have to lower MachineInstr to MCInst to use the new printer. Cheers, Rafael
2018 Feb 07
3
retpoline mitigation and 6.0
On Wed, Feb 07, 2018 at 08:44:32PM +0000, David Woodhouse wrote: > On Wed, 2018-02-07 at 10:11 -0800, Guenter Roeck wrote: > > > On Wed, Feb 07, 2018 at 10:49:25AM +0000, David Woodhouse wrote: > > > Hm, please could we also have the %V asm constraint modifier? That > > > allows us to emit calls to the thunks from inline asm using the > > > register that the