Displaying 5 results from an estimated 5 matches for "preregalloc".
2016 Feb 29
2
X86 Backend - How to push and pop eflags?
Hello llvm-dev list,
i am implementing an X86 Machine Pass that at some point needs to push/pop
eflags on the stack. This pass is hooked at preRegAlloc and LLVM is 3.7.0.
I got two big problems:
1) I didn't found a way to emit a pushfq instruction in a clean way, i.e.
with BuildMI(*MBB, MI, DL, TII.get(X86::PUSHF64)). Even if both EFLAGS
and RSP are added to the MBB liveins, the Machine Verifier complains saying:
*** Bad machine code: Using...
2020 Mar 24
3
Questions on ifconversion and predication
Assume an architecture that has multiple condition code registers, e.g., powerpc.
Now assume that there are predicate instructions like thumb2, but can specify
which condition code register they refer to.
Now also assume that these predicate instructions themselves are predicatible,
if executed they change the current predication state.
Can LLVM handle multiple levels of predication?
When is
2018 May 07
0
How to add assembly instructions in CodeGen
...de, I get segmentation fault (precisely in printf with XMM registers). Where should I add my pass?
>
> My pass depends on the MachineBasicBlock information as well. Therefore, I cannot add my pass too early in LLVM IR. What is the proper pass to add my custom MachineFunctionPass? I tried addPreRegAlloc, but it failed due to insufficient register allocation error or something on that line.
>
> Can anybody please help me write a MachineFunctionPass where I can insert assembly instruction without breaking the alignment? I am doing this for X86_64.
>
> Regards,
> Soham Sinha
> PhD...
2018 May 05
4
How to add assembly instructions in CodeGen
...enerated code, I get segmentation fault
(precisely in printf with XMM registers). Where should I add my pass?
My pass depends on the MachineBasicBlock information as well. Therefore, I
cannot add my pass too early in LLVM IR. What is the proper pass to add my
custom MachineFunctionPass? I tried addPreRegAlloc, but it failed due to
insufficient register allocation error or something on that line.
Can anybody please help me write a MachineFunctionPass where I can insert
assembly instruction without breaking the alignment? I am doing this for
X86_64.
Regards,
Soham Sinha
PhD Student, Department of Comput...
2013 Feb 14
1
[LLVMdev] LiveIntervals analysis problem
Hello everyone,
please I need your help.
To reproduce my problem I created simple pass for backends (TestPass.cpp
in attached files). That pass I call from Mips backend in this way
(MipsTargetMachine.cpp):
bool MipsPassConfig::addPreRegAlloc() {
addPass(createTestPass());
return false;
}
The problem becomes, when I am trying compile file ldtoa.ll (in attached
files). Compiling process ends with errors from LiveIntervalsAnalysis.
Everything is ok without TestPass.
I don't understand what's going on. My pass doesn...