search for: preg

...; in your code), and shouldn't be allocated to any vreg in function bar. > Loading/saving RBP should be managed by the stack frame setup/teardown code. > > If it doesn't already, your allocator should filter out reserved > registers (See MachineRegisterInfo::isReserved(unsigned preg)) when > assigning physregs. > > > I AM filtering out reserved registers. > > I am not allocating RBP in function bar, I am allocating EBP, because it > is NOT in the list of reserved registers for function bar. > > Neither register RBP nor register EBP is saved/restored...

...automatic appearance in your code), and shouldn't be allocated to any vreg in function bar. Loading/saving RBP should be managed by the stack frame setup/teardown code. If it doesn't already, your allocator should filter out reserved registers (See MachineRegisterInfo::isReserved(unsigned preg)) when assigning physregs. ArrayRef<MCPhysReg> pregs = TRC->getRawAllocationOrder(&MF); for (int i = 0; i < pregs.size(); ++i) { if (MRI->isReserved(pregs[i])) continue; // use preg... } You could also use the AllocationOrder class to simplify the task of finding valid...

...mat(data.frame(plot,variety=variety-1, # year=as.factor(year)),dataframe=F),tvc=tvctomat(ctimes,name="ctimes")) #rm(Soybean,soybean,plot,variety,year,ctimes) rm(Soybean,soybean,plot,variety,year) # builtin four-parameter generalized logistic curve elliptic(data,model="logistic",preg=c(-1,3,-10,3)) # with AR(1) elliptic(data,model="logistic",preg=c(-1,3,-10,3),par=0.8) # standard logistic growth curve elliptic(data,model=~Asym/(1+exp((xmid-times)/scal)),preg=c(20,50,10)) # when variance depends on mean, must use functions instead of formulae # same logistic growth c...

...9;t be allocated to any vreg >> in function bar. Loading/saving RBP should be managed by the >> stack frame setup/teardown code. >> If it doesn't already, your allocator should filter out reserved >> registers (See MachineRegisterInfo::isReserved(unsigned preg)) >> when assigning physregs. > > I AM filtering out reserved registers. > > I am not allocating RBP in function bar, I am allocating EBP, > because it is NOT in the list of reserved registers for function bar. > > Neither register RBP nor register EBP...

...ral general purpose registers for computation. If there is an instruction which uses parameters, I should first use a move instruction, which moves the value to general purpose register. For example, in RegisterInfo.td , I have following register classes: // this is for storing parameters only def PRegs : RegisterClass<"FOO", [i32], 32, (add P0, P1, P2, P3, P4, P5, P6, P7, P8, P9, P10, P11, P12, P13, P14, P15)>; // this is general purpose register class def GRRegs : RegisterClass<"FOO", [i32], 32, (add R0, R1, R2, R3, R4, R5, R6, R7, R8, R9, R10)>; // this is...

Thanks Lang, I'll try substPhysReg. I did try your latest code, and although it made the assembler errors go away, now some of my tests produce bad output when executed. I need to look into that some more... (I did change my "usedPregSet" to be ALL pregs used in the whole function, not just those in the current instruction, so the problem should not be the erroneous over-writing of a live preg.) Also, I'm confused about the code that gets a preg for a given vreg. Previously,you gave me code that takes into account...

Thanks Jakob. I should have mentioned that earlier. :) When you see mismatched sizes on operands it's a fair bet that the subreg rewriting has gone wrong. I should have pulled that entirely out of the preg search loop in the previous example. Fixed version attached. - Lang. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20121115/35fae7e7/attachment.html> -------------- next part -------------- A non-text at...

Hi Susan, Jakob just pointed me to 'MachineOperand::substPhysReg(unsigned preg, const TargetRegisterInfo& TRI)'. That substitutes the given physreg for a virtreg operand, taking the subregister index into account. That is what my examples have been doing manually. Using substPhysReg would allow you to tidy the Gcra code up slightly. - Lang. On Thu, Nov 15, 2012 at...

Hi Susan, The problem is that the allocator is re-using the 'preg', which is calculated for an operand that may have a subreg index, for loads and stores to a stack-slot. The stack slot always has the same width as vreg (which is the right behavior), but for operands with subreg indexes, 'preg''s class will be different from 'vreg', in whi...

Thanks Lang, we are making progress! I no longer get the failed assertion, but the code I'm using for vregs that don't get allocated a preg, and thus need to be spilled and re-loaded is causing assembler errors. I suspect the problem is my code for allocating space in the stack, but I don't know how to fix it. I've attached a new version of the simple register-allocation code, a test program that causes the bad assembler to...

...d(PhysReg) && "Reserved register assignment"); Indeed there is a case where PhysReg may be a reserved physical register. Specificially, RegAllocPBQP::finalizeAlloc() may select a physical register thusly: const TargetRegisterClass &RC = *MRI.getRegClass(LI.reg); PReg = RC.getRawAllocationOrder(MF).front(); ... VRM.assignVirt2Phys(LI.reg, PReg); The documentation for TargetRegisterClass::getRawAllocationOrder() notes that the collection may include reserved registers. So it seems that the PBQP allocator may insert a reserve physical register into th...

...%vreg15 to AH, and the test case contains a copy between these registers. The copy simultaneously must have a REX prefix, and cannot have a REX prefix, hence the assertion. The problem is that not all registers in a class are allocable for all vregs. As you can see from the above constraint, which pregs are valid varies dynamically depending on the context that the register is used. The trick is to query the "allocation order" for a class (and as an added headache filter out any reserved registers). I've attached a test-case where I do this somewhat manually. In short: int regClass...

Lang - Your fix does prevent the assembler errors, but it doesn't seem to produce correct assembly. I created a slightly modified version that, for each instruction that includes a vreg, adds a check that the preg selected is not already in that instruction. I've attached that version. I think that this version of Gcra.cpp should produce correct assembler, since it's allocating one stackframe for each vreg and always loading/storing from/to that stackframe. I've attached a simpler version o...

...i, Nov 9, 2012 at 11:15 AM, Susan Horwitz <horwitz at cs.wisc.edu > <mailto:horwitz at cs.wisc.edu>> wrote: > > Thanks Lang, we are making progress! I no longer get the failed > assertion, but the code I'm using for vregs that don't get > allocated a preg, and thus need to be spilled and re-loaded is > causing assembler errors. > > I suspect the problem is my code for allocating space in the > stack, but I don't know how to fix it. > > I've attached a new version of the simple register-allocation > co...

...size(); ++I, ++J) { unsigned VReg = Added[I]->reg; const TargetRegisterClass* RC = MF->getSSARegMap()->getRegClass(VReg); TargetRegisterClass::const_iterator Iter = RC->allocation_order_begin(*MF); if (Iter + J >= RC->allocation_order_end(*MF)) J = 0; unsigned PReg = *(Iter + J); // **** Assign the newly-created live interval to a physical register VRM->assignVirt2Phys(VReg, PReg); PRT->addRegUse(PReg); DEBUG(std::cerr << "\tAdded LI: " << *Added[I] << " assigned Reg " <<...

...-o <asm file> <bitcode> Regards, Lang. On Fri, Nov 9, 2012 at 11:15 AM, Susan Horwitz <horwitz at cs.wisc.edu> wrote: > Thanks Lang, we are making progress! I no longer get the failed > assertion, but the code I'm using for vregs that don't get allocated a > preg, and thus need to be spilled and re-loaded is causing assembler errors. > > I suspect the problem is my code for allocating space in the stack, but I > don't know how to fix it. > > I've attached a new version of the simple register-allocation code, a test > program that c...

Hi Susan, The problem now is the usedPregSet. Take the instruction: %vreg13:sub_32bit<def> = ADD32rr %vreg13:sub_32bit, %EAX<kill>, %EFLAGS<imp-def,dead> %EAX will be added to usedPregSet when the instruction is encountered, but %vreg13 is a different class (64bit registers), so none of its candidates will conflict. In...

...egs"' failed. At the start of runOnMachineFunction I call Fn.getRegInfo().getNumVirtRegs(); and find that there is 1 virtual register. However, MRI->reg_empty(vreg) tells me that it is not used or defined. So my register-allocation code never sees it, and thus can't allocate a preg for it. I tried using MRI->replaceRegWith(vreg, preg); (where preg is available to vreg's register class) but that didn't work. When I look, the number of vregs in the function is still 1. Can you help with this? Thanks again! Susan On 10/31/2012 04:55 PM, Lang Hames wrote: >...

Estimados ?podrían enviarme un ejemplo en el que analicen un documento de texto con la librería library(tm) mis saludos cordiales jose [[alternative HTML version deleted]]

...ee(), then free(), see > + * regex(3). As a special case, if regex==NULL, then set > + * *compiled=NULL (regular expression NULL is intended to match > + * anything). > + */ > +static int compile_regex(regex_t **compiled, char *regex, int cflags) > { > - int r; > - regex_t *preg; > + int r; > + regex_t *preg; > > if (regex == NULL) { > *compiled = NULL; > return 0; > } > - preg = (regex_t *)malloc(sizeof(regex_t)); > + > + preg = malloc(sizeof(*preg)); > if (!preg) { > return -1; > } > @@ -371,136 +393,157 @@ &gt...