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prefetcht0
2015 Jul 30
0
[LLVMdev] [x86] Prefetch intrinsics and prefetchw
...id @llvm.prefetch(i8* %6, i32 1, i32 2, i32 1)
tail call void @llvm.prefetch(i8* %7, i32 1, i32 3, i32 1)
The generated x86_64 code for the first 4 calls, where the read/write parameter
is 0 (read) is exactly as expected:
(Generated with clang -O2 -S -march=btver2 test.c)
prefetchnta foo(%rip)
prefetcht2 foo(%rip)
prefetcht1 foo(%rip)
prefetcht0 foo(%rip)
The question is what should be expected when the r/w parameter is 1 (write).
Currently the backend generates:
prefetchnta foo(%rip)
prefetcht2 foo(%rip)
prefetcht1 foo(%rip)
prefetchw foo(%rip)
However, a different possibility would be f...