Displaying 2 results from an estimated 2 matches for "predicate_u32immpr".
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predicate_u32immpred
2016 Feb 19
3
Failure to match a DAG after a minor pattern change in a custom Target
In an attempt to add vector registers to my target, I ran into a problem.
LLVM started to complain about not being able to infer types from the
provided DAG patterns for several classes of instructions. After a
discussion on the llvm-dev mailing list and IRC channel the recommendation
was to make DAG patterns for these classes of instructions more specific.
Which is what was done. However after
2016 Feb 22
2
Failure to match a DAG after a minor pattern change in a custom Target
.../ OPC_RecordChild1, // #3 = $offset
> /*38*/ OPC_MoveChild, 1,
> /*40*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
> /*43*/ OPC_Scope, 65, /*->110*/ // 7 children in Scope
> /*45*/ OPC_CheckPredicate, 0, // Predicate_u32ImmPred
> /*47*/ OPC_MoveParent,
> /*48*/ OPC_CheckType, MVT::i32,
>
> When the matcher says "false predicate at index 123", you can look at the
> line marked with /*123*/ and see exactly what predicate it was checking.
> This helps immensely...