Displaying 7 results from an estimated 7 matches for "predicate_bit".
2012 Oct 24
3
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
...vreg7<def> = COPY %vreg49<kill>; R600_Reg32:%vreg7,%vreg49
512B%vreg29<def> = SETGT_INT 0, 0, 1, 0, 0, 0, %vreg0, 0, 0, 0, %vreg7, 0, 0, 0, 1, pred:%PRED_SEL_OFF, 0; R600_Reg32:%vreg29,%vreg0,%vreg7
528B%vreg30<def> = COPY %vreg29<kill>; R600_Reg32:%vreg30,%vreg29
544B%PREDICATE_BIT<def> = PRED_X %vreg30<kill>, 152, 16; R600_Reg32:%vreg30
560BJUMP <BB#3>, pred:%PREDICATE_BIT
576BJUMP <BB#2>, pred:%noreg
// LOOP BODY
896B%vreg31<def> = COPY %vreg6:sel_x; R600_Reg32:%vreg31 R600_Reg128:%vreg6
912B%vreg32:sel_x<def,read-undef> = COPY %vreg31&l...
2012 Oct 25
0
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
...; = COPY %vreg49<kill>; R600_Reg32:%vreg7,%vreg49
> 512B%vreg29<def> = SETGT_INT 0, 0, 1, 0, 0, 0, %vreg0, 0, 0, 0, %vreg7, 0, 0, 0, 1, pred:%PRED_SEL_OFF, 0; R600_Reg32:%vreg29,%vreg0,%vreg7
> 528B%vreg30<def> = COPY %vreg29<kill>; R600_Reg32:%vreg30,%vreg29
> 544B%PREDICATE_BIT<def> = PRED_X %vreg30<kill>, 152, 16; R600_Reg32:%vreg30
> 560BJUMP <BB#3>, pred:%PREDICATE_BIT
> 576BJUMP <BB#2>, pred:%noreg
>
> // LOOP BODY
> 896B%vreg31<def> = COPY %vreg6:sel_x; R600_Reg32:%vreg31 R600_Reg128:%vreg6
> 912B%vreg32:sel_x<def,re...
2012 Oct 25
0
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
...lt;kill>; R600_Reg32:%vreg49,%vreg13
Successors according to CFG: BB#1
BB#1: derived from LLVM BB %25
Predecessors according to CFG: BB#0 BB#3
%vreg30<def> = SETGT_INT 0, 0, 1, 0, 0, 0, %vreg0, 0, 0, 0, %vreg49, 0, 0, 0, 1, pred:%PRED_SEL_OFF, 0; R600_Reg32:%vreg30,%vreg0,%vreg49
%PREDICATE_BIT<def> = PRED_X %vreg30, 152, 16; R600_Reg32:%vreg30
JUMP <BB#3>, pred:%PREDICATE_BIT
JUMP <BB#2>, pred:%noreg
Successors according to CFG: BB#2(4) BB#3(124)
BB#2: derived from LLVM BB %31
Predecessors according to CFG: BB#1
%vreg39<def> = COPY %vreg32:sel_x; R600_Reg...
2012 Oct 25
3
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
Hi Vincent,
On 25/10/2012 18:14, Vincent Lejeune wrote:
> When examining the debug output of regalloc, it seems that joining 32bits reg also joins 128 parent reg.
>
> If I look at the :
> %vreg34<def> = COPY %vreg6:sel_y; R600_Reg32:%vreg34 R600_Reg128:%vreg6
>
> instructions ; it gets joined to :
> 928B%vreg34<def> = COPY %vreg48:sel_y;
>
> when vreg6 and
2012 Oct 26
1
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
...,%vreg13
> Successors according to CFG: BB#1
>
> BB#1: derived from LLVM BB %25
> Predecessors according to CFG: BB#0 BB#3
> %vreg30<def> = SETGT_INT 0, 0, 1, 0, 0, 0, %vreg0, 0, 0, 0, %vreg49, 0, 0, 0, 1, pred:%PRED_SEL_OFF, 0; R600_Reg32:%vreg30,%vreg0,%vreg49
> %PREDICATE_BIT<def> = PRED_X %vreg30, 152, 16; R600_Reg32:%vreg30
> JUMP <BB#3>, pred:%PREDICATE_BIT
> JUMP <BB#2>, pred:%noreg
> Successors according to CFG: BB#2(4) BB#3(124)
>
> BB#2: derived from LLVM BB %31
> Predecessors according to CFG: BB#1
> %vreg39<de...
2012 Oct 25
2
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
...r:0)
512B%vreg29<def> = SETGT_INT 0, 0, 1, 0, 0, 0, %vreg0, 0, 0, 0, %vreg7, 0, 0, 0, 1, pred:%PRED_SEL_OFF, 0; R600_Reg32:%vreg29,%vreg0,%vreg7
register: %vreg29 +[512r,528r:0)
528B%vreg30<def> = COPY %vreg29<kill>; R600_Reg32:%vreg30,%vreg29
register: %vreg30 +[528r,544r:0)
544B%PREDICATE_BIT<def> = PRED_X %vreg30<kill>, 152, 16; R600_Reg32:%vreg30
560BJUMP <BB#3>, pred:%PREDICATE_BIT
576BJUMP <BB#2>, pred:%noreg
BB#2:# derived from
608B%vreg39<def> = COPY %vreg6:sel_x; R600_Reg32:%vreg39 R600_Reg128:%vreg6
register: %vreg39 +[608r,624r:0)
624B%T2_X<def...
2012 Oct 25
0
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
...; = SETGT_INT 0, 0, 1, 0, 0, 0, %vreg0, 0, 0, 0, %vreg7, 0,
> 0, 0, 1, pred:%PRED_SEL_OFF, 0; R600_Reg32:%vreg29,%vreg0,%vreg7
> register: %vreg29 +[512r,528r:0)
> 528B%vreg30<def> = COPY %vreg29<kill>; R600_Reg32:%vreg30,%vreg29
> register: %vreg30 +[528r,544r:0)
> 544B%PREDICATE_BIT<def> = PRED_X %vreg30<kill>, 152, 16;
> R600_Reg32:%vreg30
> 560BJUMP <BB#3>, pred:%PREDICATE_BIT
> 576BJUMP <BB#2>, pred:%noreg
> BB#2:# derived from
> 608B%vreg39<def> = COPY %vreg6:sel_x; R600_Reg32:%vreg39
> R600_Reg128:%vreg6
> register: %v...