search for: predicate_alignedstor

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[LLVMdev] Selecting Vector Shuffle of Different Types
2009 Dec 02
5
[LLVMdev] Selecting Vector Shuffle of Different Types
...n reports a type contradition: VEXTRACTF128_256mri: (st:isVoid (vector_shuffle:v4f32 (undef:v8f32), VR256:v8f32:$src1, (build_vector)<<P:Predicate_VEXTRACTF128_shuffle_mask>>: $src2), addr:iPTR: $dst)<<P:Predicate_unindexedstore>><<P:Predicate_store>><<P:Predicate_alignedstore>> tblgen: In VEXTRACTF128_256mri: Type inference contradiction found in node vector_shuffle! Well, it's right! So how do I express this kind of thing? Since LLVM 2.5 shufflevector supports creating a vector of a difference size than the inputs. Which is exactly what we need for VEX...
[LLVMdev] TableGen Type Contradiction
2009 Nov 18
1
[LLVMdev] TableGen Type Contradiction
Can anyone puzzle out what tblgen is trying to tell me here? VR256:v32i8:$src MD0.VMOVDQA_256mr: (st:isVoid VR256:v32i8:$src, addr:iPTR: $dst)<<P:Predicate_unindexedstore>><<P:Predicate_store>><<P:Predicate_alignedstore>> /ptmp/dag/universal_build/debug/DEFAULT/llvm/tblgen: In MD0.VMOVDQA_256mr: Type inference contradiction found in node! I don't see any type contradiction. -Dave
[LLVMdev] Selecting Vector Shuffle of Different Types
2009 Dec 03
0
[LLVMdev] Selecting Vector Shuffle of Different Types
...tion: > > VEXTRACTF128_256mri:    (st:isVoid (vector_shuffle:v4f32 (undef:v8f32), > VR256:v8f32:$src1, (build_vector)<<P:Predicate_VEXTRACTF128_shuffle_mask>>: > $src2), addr:iPTR: > $dst)<<P:Predicate_unindexedstore>><<P:Predicate_store>><<P:Predicate_alignedstore>> > tblgen: In VEXTRACTF128_256mri: Type inference contradiction found in node > vector_shuffle! > > Well, it's right!  So how do I express this kind of thing?  Since LLVM 2.5 > shufflevector supports creating a vector of a difference size than the > inputs.  Which is e...