Displaying 4 results from an estimated 4 matches for "predcost".
2016 Jun 13
2
Is addrspace info available during instruction scheduling?
We'd like to be able to vary the latency of our load instructions based on
what address space is being loaded from. I was thinking I could do this by
overriding getOperandLatency in our target, but I'm wondering if the
addrspace info is available when instructions are scheduled?
For example, I have this in our llvm IR:
%0 = load i32 addrspace(4)* @answer, align 4
store i32 %0, i32*
2013 Sep 30
0
[LLVMdev] Out of tree targets: Possibly additional API to implement for out of tree targets using the IfConverter
...TENTION: Out of tree targets!
(I will also send out an email later to LLVMDev)
This means, if your target implements
unsigned getInstrLatency(const InstrItineraryData *ItinData,
const MachineInstr *MI,
unsigned *PredCost);
and returns a value for "PredCost", you now also need to implement
unsigned getPredictationCost(const MachineInstr *MI);
(if your target uses the IfConversion.cpp pass)
Best,
Arnold
2016 Jan 06
2
DFAPacketizer, Scheduling and LoadLatency
On Tue, Nov 17, 2015 at 11:15 AM, Krzysztof Parzyszek <
kparzysz at codeaurora.org> wrote:
> On 11/17/2015 12:26 PM, Rail Shafigulin wrote:
>
>>
>> I tried setting
>> let mayLoad = 1 {
>> class InstrLD .... {
>> }
>> }
>>
>> But that didn't seem to work. When I looked at the debug output the
>> latency for the load
2013 Apr 30
1
[LLVMdev] Instruction Scheduling - migration from v3.1 to v3.2
...*UseMI,
unsigned UseIdx) const;
virtual unsigned TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData,
const MachineInstr *MI,
unsigned *PredCost = 0) const;
Example:
def CortexA8Model : SchedMachineModel {
...
let Itineraries = CortexA8Itineraries;
}
If you don't actually have any itineraries defined in you target's Schedule.td files, you need to define some dummy itinerary with at least one entry. Something like this may w...