search for: preallocsplit

/Volumes/mrs5/net/llvm/llvm/lib/CodeGen/PreAllocSplitting.cpp: In member function ‘bool<unnamed>::PreAllocSplitting::SplitRegLiveInterval (llvm::LiveInterval*)’: /Volumes/mrs5/net/llvm/llvm/lib/CodeGen/PreAllocSplitting.cpp:546: warning: ‘SS’ may be used uninitialized in this function

lib/CodeGen/PreAllocSplitting.cpp: In member function ‘bool<unnamed>::PreAllocSplitting::SplitRegLiveInterval (llvm::LiveInterval*)’: lib/CodeGen/PreAllocSplitting.cpp:1230: warning: ‘RestoreIndex’ may be used uninitialized in this function

...n instance of where a Reaching Definition Analysis is being implemented within LLVM. I have referenced the sources files, initially hoping to find an explicit ReachingDefinitionAnalysis.cpp file ;-) but with no such luck. Other than that I have found the files SimpleRegisterCoalescing.cpp and the PreAllocSplitting.cpp which are referencing Reaching Definitions (as VNInfo objects), which leads me to believe that Reaching Definitions are created as part of the LiveIntervalAnalysis, which is a MachineFunctionPass. However, I was expecting to find a implementation of RD Analysis earlier on. I will continue...

...a Reaching Definition Analysis is > being implemented within LLVM.  I have referenced the sources files, > initially hoping to find an explicit ReachingDefinitionAnalysis.cpp file ;-) > but with no such luck.  Other than that I have found the files > SimpleRegisterCoalescing.cpp and the PreAllocSplitting.cpp which are > referencing Reaching Definitions (as VNInfo objects), which leads me to > believe that Reaching Definitions are created as part of the > LiveIntervalAnalysis, which is a MachineFunctionPass.  However, I was > expecting to find a implementation of RD Analysis earlier...

...sAnalysis so that it creates a new LiveInterval for each live range. But this will probably have a negative impact on performance and also reduce coalescing possibilities. c) May be LiveIntervals could be split after register allocation, just before rewriting? How this could be easily done? May be PreAllocSplitting or LiveIntervals::addIntervalsForSpills could be used for this purpose by slightly changing them? Interesting point here is that such splits can occur only at the MBB borders, since each live-ranges may get its own, but only one physical register May be there are also some other alternatives?...

...have a negative impact on performance and also reduce coalescing > possibilities. Not to mention it will significantly increase memory usage. > > > c) May be LiveIntervals could be split after register allocation, just > before rewriting? How this could be easily done? May be > PreAllocSplitting or LiveIntervals::addIntervalsForSpills could be > used for this purpose by slightly changing them? Interesting point > here is that such splits can occur only at the MBB borders, since each > live-ranges may get its own, but only one physical register Well, are you sure it's a re...

...performance and also reduce coalescing >> possibilities. > > Not to mention it will significantly increase memory usage. Yes, true. >> c) May be LiveIntervals could be split after register allocation, just >> before rewriting? How this could be easily done? May be >> PreAllocSplitting or LiveIntervals::addIntervalsForSpills could be >> used for this purpose by slightly changing them? Interesting point >> here is that such splits can occur only at the MBB borders, since each >> live-ranges may get its own, but only one physical register > > Well, are y...

...> is > > being implemented within LLVM. I have referenced the sources files, > > initially hoping to find an explicit ReachingDefinitionAnalysis.cpp file > ;-) > > but with no such luck. Other than that I have found the files > > SimpleRegisterCoalescing.cpp and the PreAllocSplitting.cpp which are > > referencing Reaching Definitions (as VNInfo objects), which leads me to > > believe that Reaching Definitions are created as part of the > > LiveIntervalAnalysis, which is a MachineFunctionPass. However, I was > > expecting to find a implementation of...

..., unsigned int, llvm::DenseMap<llvm::SDValue, unsigned int, llvm::DenseMapInfo<llvm::SDValue>, llvm::DenseMapInfo<unsigned int> >&)in libLLVMSelectionDAG.a(InstrEmitter.cpp.o) llvm::LiveStacks::getOrCreateInterval(int, llvm::TargetRegisterClass const*)in libLLVMCodeGen.a(PreAllocSplitting.cpp.o) llvm::VirtRegAuxInfo::CalculateRegClass(unsigned int)in libLLVMCodeGen.a(CalcSpillWeights.cpp.o) llvm::CoalescerPair::setRegisters(llvm::MachineInstr const*)in libLLVMCodeGen.a(RegisterCoalescer.cpp.o) llvm::CoalescerPair::setRegisters(llvm::MachineInstr const*)in libLL...

Hi all, There's been a recent bootstrap failure that might be covered up because of another failure. I just wanted to point this out so that people can take a look: -bw Here's the failure from our buildbot: Assertion failed: (DestReg == VirtReg && "Unknown load situation!"), function RewriteMBB, file /Volumes/Sandbox/Buildbot/llvm/build.llvm-