search for: pr408

...the passes. It's > probably the coalescer. It's tricky to get the sub-register liveness > right. I think you are right. The bad kill seems to be introduced by the coalescer. I will take a look at it. I have written a machine code verifier pass that checks the def/kill rules, see PR408. Currently it finds a lot of multiply defined registers in targets using subregisters (X86 and Blackfin). I would like to fix this in LiveVariables / LiveIntervals. Are there any major roadblocks I should be aware of? /jakob

...obably the coalescer. It's tricky to get the sub-register liveness >> right. > > I think you are right. The bad kill seems to be introduced by the > coalescer. I will take a look at it. > > I have written a machine code verifier pass that checks the def/kill > rules, see PR408. Currently it finds a lot of multiply defined > registers in targets using subregisters (X86 and Blackfin). > > I would like to fix this in LiveVariables / LiveIntervals. Are there > any major roadblocks I should be aware of? We have (sort of) plans to replace LiveVariables. One of whi...

On Apr 22, 2009, at 12:03 AM, Jakob Stoklund Olesen wrote: > I am trying to locate a bug that affects my Blackfin backend. I am > having some trouble understanding the semantics of def/kill flags on > machine operands when using subregisters. > > I compile this function: > > define void @i56_ls(i56 %x) nounwind { > store i56 %x, i56* @i56_s > ret void > } >

I am trying to locate a bug that affects my Blackfin backend. I am having some trouble understanding the semantics of def/kill flags on machine operands when using subregisters. I compile this function: define void @i56_ls(i56 %x) nounwind { store i56 %x, i56* @i56_s ret void } And get this initial machine code: Live Ins: %R0 %R1 %reg1025D<def> = MOVE %R1 %reg1024D<def> =