search for: pr1784

Displaying 5 results from an estimated 5 matches for "pr1784".

2011 Dec 13
0
[LLVMdev] [LLVM, llc] TypeLegalization, DAGCombining, vectors loading
...ed in .ll) or not? > > About vectors with element size less than 8 bits. This topic is > interesting for me. I would like to work with it. What is the best place > for discussing? llvmdev or bug #1784 (vectors of i1 and vectors x86 long > double don't work) ? I tried to fix PR1784 multiple times. I have since had some insights which have changed my mind. <4 x i32> on a machine with <8 x i32> vectors misses out on 50% of the theoretical performance. <8 x i32> on a machine with only <4 x i32> takes on unneeded code bloat and register pressure. No amoun...
2011 Dec 13
3
[LLVMdev] [LLVM, llc] TypeLegalization, DAGCombining, vectors loading
Please ignore my concurrent post :-) Lets proceed in this branch. > do you understand what it means in the non-vector case? I'm beginning to understand it now. It means the type that should be in abstract VM memory. Isn't it? The main question about MemoryVT is: should it be original always (as it was defined in .ll) or not? About vectors with element size less than 8 bits. This
2011 Dec 14
1
[LLVMdev] [LLVM, llc] TypeLegalization, DAGCombining, vectors loading
...ed in .ll) or not? > > About vectors with element size less than 8 bits. This topic is > interesting for me. I would like to work with it. What is the best place > for discussing? llvmdev or bug #1784 (vectors of i1 and vectors x86 long > double don't work) ? I tried to fix PR1784 multiple times. I have since had some insights which have changed my mind. <4 x i32> on a machine with <8 x i32> vectors misses out on 50% of the theoretical performance. <8 x i32> on a machine with only <4 x i32> takes on unneeded code bloat and register pressure. No amoun...
2017 Sep 25
0
What should a truncating store do?
(Not sure if this exactly maps to “truncating store”, but I think it at least touches some of the subjects discussed in this thread) Our out-of-tree-target need several patches to get things working correctly for us. We have introduced i24 and i40 types in ValueTypes/MachineValueTypes (in addition to the normal pow-of-2 types). And we have vectors of those (v2i40, v4i40). And the byte size in our
2017 Sep 25
3
What should a truncating store do?
On 9/25/2017 9:14 AM, Björn Pettersson A wrote: > > (Not sure if this exactly maps to “truncating store”, but I think it > at least touches some of the subjects discussed in this thread) > > Our out-of-tree-target need several patches to get things working > correctly for us. > > We have introduced i24 and i40 types in ValueTypes/MachineValueTypes > (in addition to