search for: pr16962

Displaying 4 results from an estimated 4 matches for "pr16962".

Did you mean: pr16961
2013 Nov 27
2
[LLVMdev] Some bugs in x86 disasm (llvm-mc)
> I would file a bugzilla in the x86 component and cc Craig Topper, the x86 > disasm/codegen expert. If you chase down the revision history, there are already a couple of bugs filed: PR16961 and PR16962. Cheers. Tim.
2013 Nov 27
0
[LLVMdev] Some bugs in x86 disasm (llvm-mc)
...2013 at 10:17 AM, Tim Northover <t.p.northover at gmail.com>wrote: > > I would file a bugzilla in the x86 component and cc Craig Topper, the x86 > > disasm/codegen expert. > > If you chase down the revision history, there are already a couple of > bugs filed: PR16961 and PR16962. > > Cheers. > > Tim. > -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20131127/f8b9591c/attachment.html>
2013 Nov 27
0
[LLVMdev] Some bugs in x86 disasm (llvm-mc)
Hi Jun, I'm not sure how to fix this yet, but this looks incorrectly defined in lib/Target/X86/X86InstrInfo.td: def MOV32o32a : Ii32 <0xA1, RawFrm, (outs), (ins offset32:$src), "mov{l}\t{$src, %eax|eax, $src}", [], IIC_MOV_MEM>, Requires<[In32BitMode]>; This instruction can be REX-prefixed for a 64-bit move, and that also
2013 Nov 27
3
[LLVMdev] Some bugs in x86 disasm (llvm-mc)
Hi, With objdump, i have this (Intel syntax) 64 a1 00 00 00 00 mov eax,fs:0x0 However, if I pass above string to llvm-mc, I would have: $ echo "0x64 0xa1 0x00 0x00 0x00 0x00"|./Release+Asserts/bin/llvm-mc -disassemble -arch=x86 --output-asm-variant=1 .text mov eax, dword ptr [0] You can see a big difference. This is on the latest code. Any idea how to