Displaying 3 results from an estimated 3 matches for "pr15581".
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pr15501
2013 Apr 08
1
[LLVMdev] Is r174746 broken on ARM?
On 04/04/2013 05:09 PM, Hal Finkel wrote:
> Looking briefly at the code in comment 5 of PR15581, is that the pre-decrement case?
> I can't test that case on PPC, so I can certainly believe that there is a problem somewhere.
> The relevant code is a little farther down:
>
> APInt OV =
> cast<ConstantSDNode>(Offset)->getAPIntValue();
> if (AM == I...
2013 Apr 04
0
[LLVMdev] Is r174746 broken on ARM?
...en Use->getOpcode() == ISD::SUB and try to figure out whether the problem is related to folding with ADDs or SUBs.
2. In the problematic case, skip the loop when AM == ISD::PRE_DEC, and see if the problem is related to pre-increment or pre-decrement.
Looking briefly at the code in comment 5 of PR15581, is that the pre-decrement case? I can't test that case on PPC, so I can certainly believe that there is a problem somewhere. The relevant code is a little farther down:
APInt OV =
cast<ConstantSDNode>(Offset)->getAPIntValue();
if (AM == ISD::PRE_DEC)
OV = -OV;...
2013 Apr 04
2
[LLVMdev] Is r174746 broken on ARM?
Hello Hal,
I have a strong suspicion that your constant folding optimization
introduced at r174746 is broken on ARM. There is a bug about it:
http://llvm.org/bugs/show_bug.cgi?id=15581
There is no such issue with 3.2, and reverting r174746 on top of
r178740 also fixes the problem. I'm trying to fix it myself, but
still have no good ideas; so it would be great to have an advice
from you.