Displaying 2 results from an estimated 2 matches for "ppcvsxfmamut".
2015 Sep 29
2
TwoAddressInstructionPass::isProfitableToConv3Addr()
A similar setting occurs with ARM Thumb code which for many instructions has a short 2-address encoding and a longer 3 address form. As far as I know this is done by selecting the 3 address form and rewriting them to 2-address after register allocation where possible. See lib/Target/ARM/Thumb2SizeReduction.cpp.
- Matthias
> On Sep 29, 2015, at 2:22 PM, Quentin Colombet via llvm-dev
2015 Sep 29
4
TwoAddressInstructionPass::isProfitableToConv3Addr()
Hi,
I have cases of instruction pairs, where one is cheaper 2-address, and
the other 3-address. I would like to select the 2-addr instruction
during isel, but use the 3-addr instruction to avoid a copy if possible.
I find that TwoAddressInstructionPass::isProfitableToConv3Addr() is only
checking
for the case of a physreg copy, and so leaves the majority of cases as
they are (2-address).
I