Displaying 3 results from an estimated 3 matches for "ppcinstrvsx".
2017 May 28
2
Pseudo-instruction that overwrites its input register
On Sun, 28 May 2017, David Chisnall wrote:
>> let Constraints = "@earlyclobber $reg" in
>> def LDWRdPtr : Pseudo<(outs DREGS:$reg),
>> (ins PTRREGS:$ptrreg),
>> "ldw\t$reg, $ptrreg",
>> [(set i16:$reg, (load i16:$ptrreg))]>,
>>
2017 May 30
2
Pseudo-instruction that overwrites its input register
...: the definition of LBZU and friends in lib/Target/PowerPC/PPCInstrInfo.td.
> For a simpler example of just the `RegConstraint` usage (as it doesn't use a compound
> node like PPC's address nodes), you can look at all the fused multiply-add such as
> XSMADDADP in lib/Target/PowerPC/PPCInstrVSX.td.
>
> Hope this helps.
Thanks!
However, none of the NoEncode examples in PPCInstrInfo.td seem to have an
isel pattern; and the VSX examples, like XSMADDADP, seem to match on
setting a single output:
let BaseName = "XSMADDADP" in {
let isCommutable = 1 in
def XSMADDA...
2017 May 30
1
Pseudo-instruction that overwrites its input register
...>> lib/Target/PowerPC/PPCInstrInfo.td.
>> For a simpler example of just the `RegConstraint` usage (as it doesn't
>> use a compound
>> node like PPC's address nodes), you can look at all the fused
>> multiply-add such as
>> XSMADDADP in lib/Target/PowerPC/PPCInstrVSX.td.
>>
>> Hope this helps.
>>
>
> Thanks!
>
> However, none of the NoEncode examples in PPCInstrInfo.td seem to have an
> isel pattern; and the VSX examples, like XSMADDADP, seem to match on
> setting a single output:
>
> let BaseName = "XSMADDADP&qu...