search for: ppccall

...ys, &Ops[0], Ops.size()); This creates a call node with a list of input registers, these are marked as uses. In the PPC backend, this is matched with this pattern: ... def BLA : IForm<18, 1, 1, (ops aaddr:$func, variable_ops), "bla $func", BrB, [(PPCcall (i32 imm:$func))]>; ... The "variable_ops" part of the operation list causes all those registers to be added to the node when the isel turns the isel graph into the sched graph. Unfortunately, this will not work with extra definitions (call clobbered regs in your case). Perhaps t...

...all instructions def BL : IForm<18, 0, 1, (ops calltarget:$func, variable_ops), "bl $func", BrB, []>; // See Pat patterns below. def BLA : IForm<18, 1, 1, (ops aaddr:$func, variable_ops), "bla $func", BrB, [(PPCcall (i32 imm:$func))]>; def BCTRL : XLForm_2_ext<19, 528, 20, 0, 1, (ops variable_ops), "bctrl", BrB, [(PPCbctrl)]>; }

Hi Chris, Thanks for your response. > On Sat, 14 Oct 2006, Roman Levenstein wrote: > > Is it possible to dynamically define implicit defs for some > > instructions? > > Yes! This is what explicit operands are :). Specifically, if you > want to > vary on a per-opcode basis what registers are used/def'd by the > instruction, you can just add those registers

...def BL : IForm<18, 0, 1, (ops calltarget:$func, variable_ops), > "bl $func", BrB, []>; // See Pat patterns > below. > def BLA : IForm<18, 1, 1, (ops aaddr:$func, variable_ops), > "bla $func", BrB, [(PPCcall (i32 imm: > $func))]>; > def BCTRL : XLForm_2_ext<19, 528, 20, 0, 1, (ops variable_ops), > "bctrl", BrB, > [(PPCbctrl)]>; > } > > > _______________________________________________ > LLVM Developers mailing list > LLVMdev...

On Fri, 2 Feb 2007, Nicolas Geoffray wrote: > I have almost completed the implementation of a linux/ppc backend in llvm. Cool! > There were a few things to modify in > lib/Target/PowerPC with a lot of "if (!isDarwin)". Some meta comments: 1. Please don't change PPC -> llvmPPC. I assume that you did this because PPC is a #define in some system header. Please

Hi everyone, I have almost completed the implementation of a linux/ppc backend in llvm. There were a few things to modify in lib/Target/PowerPC with a lot of "if (!isDarwin)". There are some places where I need help before saying the port is complete. I attached the diff file as a reference 1) In order to generate a creqv instruction before a vararg call, I created a new