Displaying 20 results from an estimated 45 matches for "powergate".
2015 Jan 05
4
[PATCH 1/11] ARM: tegra: add function to control the GPU rail clamp
...ince Hsu wrote:
> On 12/24/2014 09:16 PM, Lucas Stach wrote:
> >Am Dienstag, den 23.12.2014, 18:39 +0800 schrieb Vince Hsu:
> >>The Tegra124 and later Tegra SoCs have a sepatate rail gating register
> >>to enable/disable the clamp. The original function
> >>tegra_powergate_remove_clamping() is not sufficient for the enable
> >>function. So add a new function which is dedicated to the GPU rail
> >>gating. Also don't refer to the powergate ID since the GPU ID makes no
> >>sense here.
> >>
> >>Signed-off-by: Vince Hsu <...
2015 Jan 06
2
[PATCH 1/11] ARM: tegra: add function to control the GPU rail clamp
...14 09:16 PM, Lucas Stach wrote:
> >>>Am Dienstag, den 23.12.2014, 18:39 +0800 schrieb Vince Hsu:
> >>>>The Tegra124 and later Tegra SoCs have a sepatate rail gating register
> >>>>to enable/disable the clamp. The original function
> >>>>tegra_powergate_remove_clamping() is not sufficient for the enable
> >>>>function. So add a new function which is dedicated to the GPU rail
> >>>>gating. Also don't refer to the powergate ID since the GPU ID makes no
> >>>>sense here.
> >>>>
> >...
2015 Jan 06
2
[PATCH 2/11] memory: tegra: add mc flush support
...resets = <&tegra_car 184>,
<&mc TEGRA_SWGROUP_GPU>;
reset-names = "module", "client";
};
...
};
};
The PMC driver could then grab the "module" and "client" resets and do
something like this:
reset_control_assert(powergate->rst_client);
reset_control_assert(powergate->rst_module);
reset_control_deassert(powergate->rst_module);
reset_control_deassert(powergate->rst_client);
Optionally the above could be extended with a reset_control_status()-
loop. Alternatively reset_control_assert() would block until...
2015 Jan 06
2
[PATCH 1/11] ARM: tegra: add function to control the GPU rail clamp
...> >>>>>Am Dienstag, den 23.12.2014, 18:39 +0800 schrieb Vince Hsu:
> >>>>>>The Tegra124 and later Tegra SoCs have a sepatate rail gating register
> >>>>>>to enable/disable the clamp. The original function
> >>>>>>tegra_powergate_remove_clamping() is not sufficient for the enable
> >>>>>>function. So add a new function which is dedicated to the GPU rail
> >>>>>>gating. Also don't refer to the powergate ID since the GPU ID makes no
> >>>>>>sense here.
> &g...
2015 Jan 07
4
[PATCH 1/11] ARM: tegra: add function to control the GPU rail clamp
...14 09:16 PM, Lucas Stach wrote:
>>>> Am Dienstag, den 23.12.2014, 18:39 +0800 schrieb Vince Hsu:
>>>>> The Tegra124 and later Tegra SoCs have a sepatate rail gating register
>>>>> to enable/disable the clamp. The original function
>>>>> tegra_powergate_remove_clamping() is not sufficient for the enable
>>>>> function. So add a new function which is dedicated to the GPU rail
>>>>> gating. Also don't refer to the powergate ID since the GPU ID makes no
>>>>> sense here.
>>>>>
>>&g...
2015 Jan 07
4
[PATCH 1/11] ARM: tegra: add function to control the GPU rail clamp
...> >>>>Am Dienstag, den 23.12.2014, 18:39 +0800 schrieb Vince Hsu:
> > >>>>>The Tegra124 and later Tegra SoCs have a sepatate rail gating register
> > >>>>>to enable/disable the clamp. The original function
> > >>>>>tegra_powergate_remove_clamping() is not sufficient for the enable
> > >>>>>function. So add a new function which is dedicated to the GPU rail
> > >>>>>gating. Also don't refer to the powergate ID since the GPU ID makes no
> > >>>>>sense here.
>...
2015 Jan 07
0
[PATCH 2/11] memory: tegra: add mc flush support
...p;mc TEGRA_SWGROUP_GPU>;
> reset-names = "module", "client";
> };
>
> ...
> };
> };
>
> The PMC driver could then grab the "module" and "client" resets and do
> something like this:
>
> reset_control_assert(powergate->rst_client);
> reset_control_assert(powergate->rst_module);
> reset_control_deassert(powergate->rst_module);
> reset_control_deassert(powergate->rst_client);
>
> Optionally the above could be extended with a reset_control_status()-
> loop. Alternatively reset_cont...
2015 Jan 06
0
[PATCH 1/11] ARM: tegra: add function to control the GPU rail clamp
...t;>>Am Dienstag, den 23.12.2014, 18:39 +0800 schrieb Vince Hsu:
> > >>>>>>The Tegra124 and later Tegra SoCs have a sepatate rail gating register
> > >>>>>>to enable/disable the clamp. The original function
> > >>>>>>tegra_powergate_remove_clamping() is not sufficient for the enable
> > >>>>>>function. So add a new function which is dedicated to the GPU rail
> > >>>>>>gating. Also don't refer to the powergate ID since the GPU ID makes no
> > >>>>>>sens...
2015 Jan 06
0
[PATCH 1/11] ARM: tegra: add function to control the GPU rail clamp
...> On 12/24/2014 09:16 PM, Lucas Stach wrote:
>>> Am Dienstag, den 23.12.2014, 18:39 +0800 schrieb Vince Hsu:
>>>> The Tegra124 and later Tegra SoCs have a sepatate rail gating register
>>>> to enable/disable the clamp. The original function
>>>> tegra_powergate_remove_clamping() is not sufficient for the enable
>>>> function. So add a new function which is dedicated to the GPU rail
>>>> gating. Also don't refer to the powergate ID since the GPU ID makes no
>>>> sense here.
>>>>
>>>> Signed-of...
2015 Jan 06
0
[PATCH 1/11] ARM: tegra: add function to control the GPU rail clamp
...as Stach wrote:
>>>>> Am Dienstag, den 23.12.2014, 18:39 +0800 schrieb Vince Hsu:
>>>>>> The Tegra124 and later Tegra SoCs have a sepatate rail gating register
>>>>>> to enable/disable the clamp. The original function
>>>>>> tegra_powergate_remove_clamping() is not sufficient for the enable
>>>>>> function. So add a new function which is dedicated to the GPU rail
>>>>>> gating. Also don't refer to the powergate ID since the GPU ID makes no
>>>>>> sense here.
>>>>>...
2015 Jan 08
2
[PATCH 1/11] ARM: tegra: add function to control the GPU rail clamp
...> 1) domain->resume
> 2) device->resume
>
> But then we're back to square one, namely that the MC flush doesn't work
> properly, since it needs to be implemented in domain->suspend. Does that
> mean we can't clock-gate modules? In order to ensure a proper powergate
> sequence, the domain code would need to clk_enable() the module clock to
> make sure it stays on during the reset sequence. But if the domain code
> has a reference to the clock, then the driver can't clock-gate the
> module anymore by calling clk_disable().
>
> Am I missin...
2015 Jan 07
0
[PATCH 1/11] ARM: tegra: add function to control the GPU rail clamp
...as Stach wrote:
> >>>>Am Dienstag, den 23.12.2014, 18:39 +0800 schrieb Vince Hsu:
> >>>>>The Tegra124 and later Tegra SoCs have a sepatate rail gating register
> >>>>>to enable/disable the clamp. The original function
> >>>>>tegra_powergate_remove_clamping() is not sufficient for the enable
> >>>>>function. So add a new function which is dedicated to the GPU rail
> >>>>>gating. Also don't refer to the powergate ID since the GPU ID makes no
> >>>>>sense here.
> >>>&g...
2015 Jan 07
0
[PATCH 1/11] ARM: tegra: add function to control the GPU rail clamp
...as Stach wrote:
> >>>>Am Dienstag, den 23.12.2014, 18:39 +0800 schrieb Vince Hsu:
> >>>>>The Tegra124 and later Tegra SoCs have a sepatate rail gating register
> >>>>>to enable/disable the clamp. The original function
> >>>>>tegra_powergate_remove_clamping() is not sufficient for the enable
> >>>>>function. So add a new function which is dedicated to the GPU rail
> >>>>>gating. Also don't refer to the powergate ID since the GPU ID makes no
> >>>>>sense here.
> >>>&g...
2015 Jan 07
0
[PATCH 1/11] ARM: tegra: add function to control the GPU rail clamp
...gt;>Am Dienstag, den 23.12.2014, 18:39 +0800 schrieb Vince Hsu:
> > > >>>>>The Tegra124 and later Tegra SoCs have a sepatate rail gating register
> > > >>>>>to enable/disable the clamp. The original function
> > > >>>>>tegra_powergate_remove_clamping() is not sufficient for the enable
> > > >>>>>function. So add a new function which is dedicated to the GPU rail
> > > >>>>>gating. Also don't refer to the powergate ID since the GPU ID makes no
> > > >>>>>s...
2015 Jan 07
0
[PATCH 1/11] ARM: tegra: add function to control the GPU rail clamp
...On 12/24/2014 09:16 PM, Lucas Stach wrote:
> > >Am Dienstag, den 23.12.2014, 18:39 +0800 schrieb Vince Hsu:
> > >>The Tegra124 and later Tegra SoCs have a sepatate rail gating register
> > >>to enable/disable the clamp. The original function
> > >>tegra_powergate_remove_clamping() is not sufficient for the enable
> > >>function. So add a new function which is dedicated to the GPU rail
> > >>gating. Also don't refer to the powergate ID since the GPU ID makes no
> > >>sense here.
> > >>
> > >>Sig...
2017 Jun 09
4
[PATCH 1/3] drm/nouveau/tegra: Skip manual unpowergating when not necessary
...ndex 6474bd2a6d07..3d42cdbbe9c0 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c
@@ -51,10 +51,12 @@ nvkm_device_tegra_power_up(struct nvkm_device_tegra *tdev)
reset_control_assert(tdev->rst);
udelay(10);
- ret = tegra_powergate_remove_clamping(TEGRA_POWERGATE_3D);
- if (ret)
- goto err_clamp;
- udelay(10);
+ if (!tdev->pdev->dev.pm_domain) {
+ ret = tegra_powergate_remove_clamping(TEGRA_POWERGATE_3D);
+ if (ret)
+ goto err_clamp;
+ udelay(10);
+ }
reset_control_deassert(tdev->rst);
udelay(10);
--
2.1...
2015 Jan 07
2
[PATCH 1/11] ARM: tegra: add function to control the GPU rail clamp
...I don't get the clock and reset from module. How do you think?
>
> This whole situation is quite messy. The above sequence basically means
> that drivers can't reset hardware modules because otherwise they might
> race with the power domain code. It also means that we can't powergate
The powerdomain framework won't call any powergating method as long as a
module in the domain is still active. So as long as drivers don't try to
reset the hw without having done a pm_runtime_get(), we shouldn't have such
a race?
> modules on demand because they might be in the sam...
2015 Jan 07
2
[PATCH 1/11] ARM: tegra: add function to control the GPU rail clamp
...module. How do you think?
> > >
> > > This whole situation is quite messy. The above sequence basically means
> > > that drivers can't reset hardware modules because otherwise they might
> > > race with the power domain code. It also means that we can't powergate
> >
> > The powerdomain framework won't call any powergating method as long as a
> > module in the domain is still active. So as long as drivers don't try to
> > reset the hw without having done a pm_runtime_get(), we shouldn't have such
> > a race?
> A...
2014 Dec 24
3
[PATCH 1/11] ARM: tegra: add function to control the GPU rail clamp
Am Dienstag, den 23.12.2014, 18:39 +0800 schrieb Vince Hsu:
> The Tegra124 and later Tegra SoCs have a sepatate rail gating register
> to enable/disable the clamp. The original function
> tegra_powergate_remove_clamping() is not sufficient for the enable
> function. So add a new function which is dedicated to the GPU rail
> gating. Also don't refer to the powergate ID since the GPU ID makes no
> sense here.
>
> Signed-off-by: Vince Hsu <vinceh at nvidia.com>
To be honest...
2015 Jan 08
0
[PATCH 1/11] ARM: tegra: add function to control the GPU rail clamp
...ume
> > 2) device->resume
> >
> > But then we're back to square one, namely that the MC flush doesn't work
> > properly, since it needs to be implemented in domain->suspend. Does that
> > mean we can't clock-gate modules? In order to ensure a proper powergate
> > sequence, the domain code would need to clk_enable() the module clock to
> > make sure it stays on during the reset sequence. But if the domain code
> > has a reference to the clock, then the driver can't clock-gate the
> > module anymore by calling clk_disable().
&g...