search for: power_w_max

..., struct device_attribute *a, > + char *buf) > +{ > + struct drm_device *dev = dev_get_drvdata(d); > + struct nouveau_drm *drm = nouveau_drm(dev); > + struct nvkm_iccsense *iccsense = nvxx_iccsense(&drm->device); > + return sprintf(buf, "%i\n", iccsense->power_w_max); > +} > + > +static SENSOR_DEVICE_ATTR(power1_max, S_IRUGO, > + nouveau_hwmon_get_power1_max, NULL, 0); > + > +static ssize_t > +nouveau_hwmon_get_power1_crit(struct device *d, struct device_attribute *a, > + char *buf) > +{ > + struct drm_device *dev = de...

...is simplier/cleaner) > + iccsense->data_valid && > + !list_empty(&iccsense->rails)) > + return 0444; add return due to fallthrough > + case hwmon_power_max: > + if (iccsense->power_w_max) > + return 0444; add return due to fallthrough > + case hwmon_power_crit: > + if (iccsense->power_w_crit) > + return 0444; add return due to fallthrough > + default: > + return 0; > +...

There is an optinal header field in the power budget table we can use to read out the power cap of the GPU. Sadly it is optional and if that field isn't sad, things beome complicated. Anyhow, this is good enough for most cards and we can use it later for capping the power consumption of the GPUs, but first, just export those values through hwmon. First design, will change stuff, want

There is an optinal header field in the power budget table we can use to read out the power cap of the GPU. The meaning of this header field was confirmed with nvidia-smi -q: The rows "Min Power Limit", "Power Limit" and "Max Power Limit" are set to the "min", "avg" and "max" values from the referenced power budget entry respectively.

...ense.h b/drm/nouveau/include/nvkm/subdev/iccsense.h index 3c2ddd9..b7a9b04 100644 --- a/drm/nouveau/include/nvkm/subdev/iccsense.h +++ b/drm/nouveau/include/nvkm/subdev/iccsense.h @@ -8,6 +8,9 @@ struct nvkm_iccsense { bool data_valid; struct list_head sensors; struct list_head rails; + + u32 power_w_max; + u32 power_w_crit; }; int gf100_iccsense_new(struct nvkm_device *, int index, struct nvkm_iccsense **); diff --git a/drm/nouveau/nvkm/subdev/iccsense/base.c b/drm/nouveau/nvkm/subdev/iccsense/base.c index 658355f..4e2b074 100644 --- a/drm/nouveau/nvkm/subdev/iccsense/base.c +++ b/drm/nouveau/...

...et_power1_max(struct device *d, struct device_attribute *a, + char *buf) +{ + struct drm_device *dev = dev_get_drvdata(d); + struct nouveau_drm *drm = nouveau_drm(dev); + struct nvkm_iccsense *iccsense = nvxx_iccsense(&drm->device); + return sprintf(buf, "%i\n", iccsense->power_w_max); +} + +static SENSOR_DEVICE_ATTR(power1_max, S_IRUGO, + nouveau_hwmon_get_power1_max, NULL, 0); + +static ssize_t +nouveau_hwmon_get_power1_crit(struct device *d, struct device_attribute *a, + char *buf) +{ + struct drm_device *dev = dev_get_drvdata(d); + struct nouveau_drm *drm = nouv...

....device); + int ret; if (!iccsense) return -EOPNOTSUPP; switch (attr) { case hwmon_power_input: - *val = nvkm_iccsense_read_all(iccsense); + ret = nvkm_iccsense_read_all(iccsense); + if (ret < 0) + return ret; + *val = ret; break; case hwmon_power_max: + if (iccsense->power_w_max <= 0) + return -ENODEV; *val = iccsense->power_w_max; break; case hwmon_power_crit: + if (iccsense->power_w_crit <= 0) + return -ENODEV; *val = iccsense->power_w_crit; break; default: -- 2.14.1

...return 0; switch (attr) { case hwmon_power_input: if (iccsense->data_valid && !list_empty(&iccsense->rails)) return 0444; case hwmon_power_max: if (iccsense->power_w_max) return 0444; case hwmon_power_crit: if (iccsense->power_w_crit) return 0444; default: return 0; } Could you drop me a hint? On 18 April 2017 at 09:56, Karol Herbst <karolherbst at gmail...

There is an optinal header field in the power budget table we can use to read out the power cap of the GPU. We should have this in the kernel before actually using it to catch errors and see how reliable this is, but as it seems it works on all GPUs as expected on Kepler und Maxwells with the power cap field set in the vbios. This series keeps things really simple for now until we figure out

There is an optinal header field in the power budget table we can use to read out the power cap of the GPU. We should have this in the kernel before actually using it to catch errors and see how reliable this is, but as it seems it works on all GPUs as expected on Kepler und Maxwells with the power cap field set in the vbios. This series keeps things really simple for now until we figure out

...iccsense *iccsense = nvxx_iccsense(&drm->client.device); + + switch (attr) { + case hwmon_power_input: + if (iccsense && iccsense->data_valid && + !list_empty(&iccsense->rails)) + return 0444; + case hwmon_power_max: + case hwmon_power_crit: + if (iccsense->power_w_max && iccsense->power_w_crit) + return 0444; + default: + return 0; + } +} + +static umode_t +nouveau_temp_is_visible(const void *data, u32 attr, int channel) +{ + struct nouveau_drm *drm = nouveau_drm((struct drm_device *)data); + struct nvkm_therm *therm = nvxx_therm(&drm->clien...

...*buf) +static int +nouveau_hwmon_get_power1_max(struct nouveau_drm *drm) { - struct drm_device *dev = dev_get_drvdata(d); - struct nouveau_drm *drm = nouveau_drm(dev); struct nvkm_iccsense *iccsense = nvxx_iccsense(&drm->client.device); - return sprintf(buf, "%i\n", iccsense->power_w_max); -} -static SENSOR_DEVICE_ATTR(power1_max, S_IRUGO, - nouveau_hwmon_get_power1_max, NULL, 0); + return iccsense->power_w_max; +} -static ssize_t -nouveau_hwmon_get_power1_crit(struct device *d, struct device_attribute *a, - char *buf) +static int +nouveau_hwmon_get_power1_crit(s...

...with the iccsense in the above line, but this is our coding style at least. Anyway, this condition has to be moved before the switch as we should not expose power_max/crit if power_input is not exposed. > + return 0444; > + return 0; > + case hwmon_power_max: > + if (iccsense->power_w_max) > + return 0444; > + return 0; > + case hwmon_power_crit: > + if (iccsense->power_w_crit) > + return 0444; > + return 0; > + default: > + return 0; > + } > +} > + > +static umode_t > +nouveau_temp_is_visible(const void *data, u32 attr, int channel)...

Kbuild sent me an e-mail due to a fixup I introduced in v3. It complains due to an incompatible pointer type and it doesn't build. This version reverts it. Versions: v1 -> v2: * Keep temp attrs as read only v2 -> v3: * Code fix-ups: struct and string as const and add return within switch due to fallthrough * Add Signed-off-by to all commits v3 -> v4:

This v5 drops a check for attr_set. Versions: v1 -> v2: * Keep temp attrs as read only v2 -> v3: * Code fix-ups: struct and string as const and add return within switch due to fallthrough * Add Signed-off-by to all commits v3 -> v4: * Rever const to struct attribute. Kbuild complains. v4 -> v5: * Drops a check for attr_set in

...ruct nouveau_drm *drm) > { > - struct drm_device *dev = dev_get_drvdata(d); > - struct nouveau_drm *drm = nouveau_drm(dev); > struct nvkm_iccsense *iccsense = nvxx_iccsense(&drm->client. device); > - return sprintf(buf, "%i\n", iccsense->power_w_max); > -} > > -static SENSOR_DEVICE_ATTR(power1_max, S_IRUGO, > - nouveau_hwmon_get_power1_max, NULL, 0); > + return iccsense->power_w_max; > +} > > -static ssize_t > -nouveau_hwmon_get_power1_crit(struct device *d, struct device_attribute *a...

...*buf) +static int +nouveau_hwmon_get_power1_max(struct nouveau_drm *drm) { - struct drm_device *dev = dev_get_drvdata(d); - struct nouveau_drm *drm = nouveau_drm(dev); struct nvkm_iccsense *iccsense = nvxx_iccsense(&drm->client.device); - return sprintf(buf, "%i\n", iccsense->power_w_max); -} -static SENSOR_DEVICE_ATTR(power1_max, S_IRUGO, - nouveau_hwmon_get_power1_max, NULL, 0); + return iccsense->power_w_max; +} -static ssize_t -nouveau_hwmon_get_power1_crit(struct device *d, struct device_attribute *a, - char *buf) +static int +nouveau_hwmon_get_power1_crit(s...

Hi! This patchseries replaces the deprecated hwmon_device_register function with the new one hwmon_device_register_with_info. It also does some cleanup. Here is the list of patches and what they do: 1/ Adds config structures for all sensors and their possible settings. This patch and the next one are just preparing the code for what it comes. 2/ Now everything goes through

...*buf) +static int +nouveau_hwmon_get_power1_max(struct nouveau_drm *drm) { - struct drm_device *dev = dev_get_drvdata(d); - struct nouveau_drm *drm = nouveau_drm(dev); struct nvkm_iccsense *iccsense = nvxx_iccsense(&drm->client.device); - return sprintf(buf, "%i\n", iccsense->power_w_max); -} -static SENSOR_DEVICE_ATTR(power1_max, S_IRUGO, - nouveau_hwmon_get_power1_max, NULL, 0); + return iccsense->power_w_max; +} -static ssize_t -nouveau_hwmon_get_power1_crit(struct device *d, struct device_attribute *a, - char *buf) +static int +nouveau_hwmon_get_power1_crit(s...

This v6 fixes some comments pointed out by Martin Peres. Versions: v1 -> v2: * Keep temp attrs as read only v2 -> v3: * Code fix-ups: struct and string as const and add return within switch due to fallthrough * Add Signed-off-by to all commits v3 -> v4: * Rever const to struct attribute. Kbuild complains. v4 -> v5: * Drops a check for