Displaying 2 results from an estimated 2 matches for "postregalloc".
2013 Dec 05
3
[LLVMdev] X86 - Help on fixing a poor code generation bug
...;fadd' nodes
and it will be translated to 'addss' in assembly.
At this stage, the MOVSS/INSERTPS is still required since the ADDSS
alone would not be equivalent to the hardware 'movss' instruction.
I then started investigating the possibility of adding a pass that
runs at 'postRegAlloc' stage.
Before RegAlloc it may not be safe to remove the redundant MOVSSrr
because of the TwoAddressInstruction Pass; this may decide to commute
the operands of the ADDSS/MULSS.
It is possible to write a pass that scans through each basic block in
a function looking for opportunities to fold...
2013 Dec 05
0
[LLVMdev] X86 - Help on fixing a poor code generation bug
...e translated to 'addss' in assembly.
>
> At this stage, the MOVSS/INSERTPS is still required since the ADDSS
> alone would not be equivalent to the hardware 'movss' instruction.
>
> I then started investigating the possibility of adding a pass that
> runs at 'postRegAlloc' stage.
>
> Before RegAlloc it may not be safe to remove the redundant MOVSSrr
> because of the TwoAddressInstruction Pass; this may decide to commute
> the operands of the ADDSS/MULSS.
>
> It is possible to write a pass that scans through each basic block in
> a function...