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...// 0x42: callq *%rax 0x48, 0x89, 0x45, 0x08, // 0x44: movq %rax, 8(%rbp) 0x48, 0x0f, 0xae, 0x0c, 0x24, // 0x48: fxrstor64 (%rsp) 0x48, 0x81, 0xc4, 0x08, 0x02, 0x00, 0x00, // 0x4d: addq 0x208, %rsp 0x41, 0x5f, // 0x54: popq %r15 0x41, 0x5e, // 0x56: popq %r14 0x41, 0x5d, // 0x58: popq %r13 0x41, 0x5c, // 0x5a: popq %r12 0x41, 0x5b, // 0x5c: popq %r11 0x41, 0x5a,...

...// 0x44: movq %rax, 8(%rbp) >> >> 0x48, 0x0f, 0xae, 0x0c, 0x24, // 0x48: fxrstor64 (%rsp) >> >> 0x48, 0x81, 0xc4, 0x08, 0x02, 0x00, 0x00, // 0x4d: addq 0x208, %rsp >> >> 0x41, 0x5f, // 0x54: popq %r15 >> >> 0x41, 0x5e, // 0x56: popq %r14 >> >> 0x41, 0x5d, // 0x58: popq %r13 >> >> 0x41, 0x5c, // 0x5a: popq %r12 >> >> 0x41, 0x5b,...

...o whwn execution returns to main (which is caller of > makewt) > value of *ip is gone from R14 (which sould not) and when main calls makewt > again > then value of *ip (R14) is wrong and result into segmentation fault. > > Assembly code of makewt: > _makewt: > ... > popq %rbx > popq %r12 > popq %r13 > popq %r14 > popq %r15 > popq %rbp > jmp _bitrv2 ## TAILCALL > A very naive solution to this problem come to me is to convert above code to following: _makewt: ... jmp _bitrv2 ## TAILCALL p...

...ated and here bitrv2 does not preserve R14 so whwn execution returns to main (which is caller of makewt) value of *ip is gone from R14 (which sould not) and when main calls makewt again then value of *ip (R14) is wrong and result into segmentation fault. Assembly code of makewt: _makewt: ... popq %rbx popq %r12 popq %r13 popq %r14 popq %r15 popq %rbp jmp _bitrv2 ## TAILCALL There is one more case of faluire due to local function related optimization. I am analysing that (sorry for taking more time but I am not much good at assembly). I need some hints for...

...ich is caller of >> makewt) >> value of *ip is gone from R14 (which sould not) and when main calls >> makewt again >> then value of *ip (R14) is wrong and result into segmentation fault. >> >> Assembly code of makewt: >> _makewt: >> ... >> popq %rbx >> popq %r12 >> popq %r13 >> popq %r14 >> popq %r15 >> popq %rbp >> jmp _bitrv2 ## TAILCALL >> > > A very naive solution to this problem come to me is to convert above code > to following: > > _makewt:...

...bx > + pushq %rbp > + pushq %r12 > + pushq %r13 > + pushq %r14 > + pushq %r15 > + > + /* Call handler with pt_regs */ > + movq %rsp, %rdi > + call \function > + > + /* Restore regs */ > + popq %r15 > + popq %r14 > + popq %r13 > + popq %r12 > + popq %rbp > + popq %rbx > + popq %r11 > + popq %r10 > + popq %r9 > + popq %r8 > + popq %rax > + popq %rcx > +...

...rve R14 so whwn execution returns to main (which is caller of makewt) > value of *ip is gone from R14 (which sould not) and when main calls makewt again > then value of *ip (R14) is wrong and result into segmentation fault. > > Assembly code of makewt: > _makewt: > ... > popq %rbx > popq %r12 > popq %r13 > popq %r14 > popq %r15 > popq %rbp > jmp _bitrv2 ## TAILCALL > > A very naive solution to this problem come to me is to convert above code to following: > > _makewt: > ... > jmp _bitrv2...

...) >>> value of *ip is gone from R14 (which sould not) and when main calls >>> makewt again >>> then value of *ip (R14) is wrong and result into segmentation fault. >>> >>> Assembly code of makewt: >>> _makewt: >>> ... >>> popq %rbx >>> popq %r12 >>> popq %r13 >>> popq %r14 >>> popq %r15 >>> popq %rbp >>> jmp _bitrv2 ## TAILCALL >>> >> >> A very naive solution to this problem come to me is to convert above code &gt...

...6 +33,7 @@ #include <asm/processor-flags.h> #include <asm/asm-offsets.h> #include <asm/bootparam.h> +#include <asm/desc_defs.h> #include "pgtable.h" /* @@ -401,6 +402,10 @@ SYM_CODE_START(startup_64) .Lon_kernel_cs: + pushq %rsi + call load_stage1_idt + popq %rsi + /* * paging_prepare() sets up the trampoline and checks if we need to * enable 5-level paging. @@ -528,6 +533,13 @@ SYM_FUNC_START_LOCAL_NOALIGN(.Lrelocated) shrq $3, %rcx rep stosq +/* + * Load stage2 IDT + */ + pushq %rsi + call load_stage2_idt + popq %rsi + /* * Do the ex...

...m/processor-flags.h> #include <asm/asm-offsets.h> #include <asm/bootparam.h> +#include <asm/desc_defs.h> #include "pgtable.h" /* @@ -358,6 +359,10 @@ SYM_CODE_START(startup_64) movq %rax, gdt64+2(%rip) lgdt gdt64(%rip) + pushq %rsi + call load_stage1_idt + popq %rsi + /* * paging_prepare() sets up the trampoline and checks if we need to * enable 5-level paging. @@ -465,6 +470,16 @@ SYM_FUNC_END_ALIAS(efi_stub_entry) .text SYM_FUNC_START_LOCAL_NOALIGN(.Lrelocated) +/* + * Reload GDT after relocation - The GDT at the non-relocated position + *...

...is gone from R14 (which sould not) and when main calls >>>> makewt again >>>> then value of *ip (R14) is wrong and result into segmentation fault. >>>> >>>> Assembly code of makewt: >>>> _makewt: >>>> ... >>>> popq %rbx >>>> popq %r12 >>>> popq %r13 >>>> popq %r14 >>>> popq %r15 >>>> popq %rbp >>>> jmp _bitrv2 ## TAILCALL >>>> >>> >>> A very naive solution to this problem com...

This set of patches converts the way frames gets created from using PUSHes/POPs to using MOVes, thus allowing (in certain cases) to avoid saving/restoring part of the register set. While the place where the (small) win from this comes from varies between CPUs, the net effect is a 1 to 2% reduction on a combined interruption entry and exit when the full state save can be avoided. 1: use MOV

...-darwin Host: osx yosemite. The assembly (cut to the essential): LLVM: pushq %rbp movq %rsp, %rbp pushq %r14 pushq %rbx movl %edi, %r14d leal 71(%r14), %eax xorl %ecx, %ecx cmpl $56, %eax movl $92, %ebx cmovnel %ecx, %ebx leaq L_.str(%rip), %rdi callq _puts leal 71(%rbx,%r14), %eax popq %rbx popq %r14 popq %rbp retq and the gcc one: pushq %rbp movl $0, %eax movl $92, %ebp pushq %rbx leal 71(%rdi), %ebx leaq LC1(%rip), %rdi subq $8, %rsp cmpl $56, %ebx cmovne %eax, %ebp call _puts addq $8, %rsp leal 0(%rbp,%rbx), %eax popq %rbx popq %rbp ret As we can se...

...$8, %rsp movq %rsi, %rbx movq %rdi, %r14 movq %rdx, %rdi movq %rcx, %rsi callq __ZN7WebCore4viziEPKNS_20RenderBoxModelObjectEPNS_10StyleImageE movq %rax, %rcx shrq $32, %rcx testl %ecx, %ecx je LBB0_2 ## BB#1: imull (%rbx), %eax cltd idivl %ecx movl %eax, (%r14) LBB0_2: addq $8, %rsp popq %rbx popq %r14 ret $ llc opt-fail.ll -o - .section __TEXT,__text,regular,pure_instructions .globl __ZN7WebCore6kolos1ERiS0_PKNS_20RenderBoxModelObjectEPNS_10StyleImageE .align 4, 0x90 __ZN7WebCore6kolos1ERiS0_PKNS_20RenderBoxModelObjectEPNS_10StyleImageE: ## @_ZN7WebCore6kolos1ERiS0_PKNS_20...

...t i32 %2 } Note that in loadgs2, the call to toglobal has been inlined and so the back end will just see a bitcast, which SelectionDAG treats as a no-op. The assembly we get from this is: _toglobal: ## @toglobal ## BB#0: pushq %rbp movq %rsp, %rbp movq %rdi, %rax popq %rbp ret load: ## @load ## BB#0: pushq %rbp movq %rsp, %rbp movl (%rdi), %eax popq %rbp ret .globl _loadgs .align 4, 0x90 loadgs: ## @loadgs ## BB#0: pushq %rbp movq %rsp, %rbp movl %gs:(%rdi), %eax popq %rbp ret .globl...

...%rcx, %rsi > callq __ZN7WebCore4viziEPKNS_20RenderBoxModelObjectEPNS_10StyleImageE > movq %rax, %rcx > shrq $32, %rcx > testl %ecx, %ecx > je LBB0_2 > ## BB#1: > imull (%rbx), %eax > cltd > idivl %ecx > movl %eax, (%r14) > LBB0_2: > addq $8, %rsp > popq %rbx > popq %r14 > ret > > > $ llc opt-fail.ll -o - > > .section __TEXT,__text,regular,pure_instructions > .globl __ZN7WebCore6kolos1ERiS0_PKNS_20RenderBoxModelObjectEPNS_10StyleImageE > .align 4, 0x90 > __ZN7WebCore6kolos1ERiS0_PKNS_20RenderBoxModelObjectEPNS_...

...t) and when main calls makewt again >>>>>> then value of *ip (R14) is wrong and result into segmentation fault. >>>>>> >>>>>> Assembly code of makewt: >>>>>> _makewt: >>>>>> ... >>>>>> popq %rbx >>>>>> popq %r12 >>>>>> popq %r13 >>>>>> popq %r14 >>>>>> popq %r15 >>>>>> popq %rbp >>>>>> jmp _bitrv2 ## TAILCALL >>>>> >>>&g...

On Aug 7, 2013, at 7:23 PM, Michele Scandale <michele.scandale at gmail.com> wrote: > On 08/08/2013 03:52 AM, Pete Cooper wrote: >>> Why a backend should be responsible (meaning have knowledge) for a >>> mapping between high level address spaces and low level address spaces? >> Thats true. I’m thinking entirely from the persecutive of the backend >> doing

...the call to toglobal has been inlined and so the back end will just see a bitcast, which SelectionDAG treats as a no-op. The assembly we get from this is: > > _toglobal: ## @toglobal > ## BB#0: > pushq %rbp > movq %rsp, %rbp > movq %rdi, %rax > popq %rbp > ret > load: ## @load > ## BB#0: > pushq %rbp > movq %rsp, %rbp > movl (%rdi), %eax > popq %rbp > ret > > .globl _loadgs > .align 4, 0x90 > loadgs: ## @loadgs > ## BB#0: > pushq...

...%rsp, %rbp .cfi_def_cfa_register %rbp subq $16, %rsp movl $0, -4(%rbp) callq _Z7productv //here you can see the calls to product function xorl %ecx, %ecx movl %eax, -8(%rbp) movl %ecx, %eax addq $16, %rsp popq %rbp .cfi_def_cfa %rsp, 8 retq while g++ do not emits calls to constexpr function $g++ test.cpp -std=c++11 $cat test.s main: .LFB1: .cfi_startproc pushq %rbp .cfi_def_cfa_offset 16 .cfi_offset 6, -16 movq %rsp, %rbp .cfi_def_...