search for: pop32r

Displaying 7 results from an estimated 7 matches for "pop32r".

2008 Apr 16
3
[LLVMdev] Being able to know the jitted code-size before emitting
...> > What happened to "const"? > I made the function static. >> + unsigned Size = GetInstSizeWithDesc(*MI, &Desc, IsPIC, >> Is64BitMode); >> + if (Desc.getOpcode() == X86::MOVPC32r) { >> + Size += GetInstSizeWithDesc(*MI, &get(X86::POP32r), IsPIC, >> Is64BitMode); >> + } >> > > I would prefer this special case is handled in GetInstSizeWithDesc(). > > I can not do that in GetInstSizeWithDesc because the test is on the MachineInstruction, which will always say that Desc.getOpcode == MOVPC32...
2007 Dec 19
0
[LLVMdev] JIT Stub Problem
...s. falseBlock (0xa60cb18, LLVM BB @0xa5ce378, ID#81): Predecessors according to CFG: 0xa60ca80 %EAX = MOV32ri 617 %EBX = MOV32rm %EBP, 1, %NOREG, -12 %EDI = MOV32rm %EBP, 1, %NOREG, -8 %ESI = MOV32rm %EBP, 1, %NOREG, -4 %ESP = MOV32rr %EBP %EBP = POP32r RET codeRepl (0xa5f4148, LLVM BB @0xa5ce310, ID#82): Predecessors according to CFG: 0xa60ca80 %EDI = INC32r %EDI %EAX = MOV32rm %EBP, 1, %NOREG, -268 MOV32mr %EAX, 1, %NOREG, 0, %EDI CALLpcrel32 <ga:test3_trueBlock_trueBlock.ret.exitStub_newFuncRoot.c...
2008 Apr 16
0
[LLVMdev] Being able to know the jitted code-size before emitting
...nst"? >> > > I made the function static. Ok. > > >>> + unsigned Size = GetInstSizeWithDesc(*MI, &Desc, IsPIC, >>> Is64BitMode); >>> + if (Desc.getOpcode() == X86::MOVPC32r) { >>> + Size += GetInstSizeWithDesc(*MI, &get(X86::POP32r), IsPIC, >>> Is64BitMode); >>> + } >>> >> >> I would prefer this special case is handled in GetInstSizeWithDesc(). >> >> > > I can not do that in GetInstSizeWithDesc because the test is on the > MachineInstruction, which will always say t...
2011 Sep 30
2
[LLVMdev] LLVM backends instruction selection
I am new to the LLVM backends, I am wondering how instruction selection is done in LLVM backends, I looked at the .td files in Target/X86, they all seem to be small and do not deal with common X86 instructions, i.e. mov, push, pop, etc. Thanks -------------- next part -------------- An HTML attachment was scrubbed... URL:
2008 Apr 16
0
[LLVMdev] Being able to know the jitted code-size before emitting
...= Reloc::PIC_); > + bool Is64BitMode = ((X86Subtarget*)TM.getSubtargetImpl())- > >is64Bit(); > + unsigned Size = GetInstSizeWithDesc(*MI, &Desc, IsPIC, > Is64BitMode); > + if (Desc.getOpcode() == X86::MOVPC32r) { > + Size += GetInstSizeWithDesc(*MI, &get(X86::POP32r), IsPIC, > Is64BitMode); > + } I would prefer this special case is handled in GetInstSizeWithDesc(). > > + return Size; > +} Looks great! Thanks. Evan > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu...
2008 Apr 15
4
[LLVMdev] Being able to know the jitted code-size before emitting
OK, here's a new patch that adds the infrastructure and the implementation for X86, ARM and PPC of GetInstSize and GetFunctionSize. Both functions are virtual functions defined in TargetInstrInfo.h. For X86, I moved some commodity functions from X86CodeEmitter to X86InstrInfo. What do you think? Nicolas Evan Cheng wrote: > > I think both of these belong to TargetInstrInfo. And
2008 Apr 17
1
[LLVMdev] Being able to know the jitted code-size before emitting
...c. >> > > Ok. > > >> >>>> + unsigned Size = GetInstSizeWithDesc(*MI, &Desc, IsPIC, >>>> Is64BitMode); >>>> + if (Desc.getOpcode() == X86::MOVPC32r) { >>>> + Size += GetInstSizeWithDesc(*MI, &get(X86::POP32r), IsPIC, >>>> Is64BitMode); >>>> + } >>>> >>>> >>> I would prefer this special case is handled in GetInstSizeWithDesc(). >>> >>> >>> >> I can not do that in GetInstSizeWithDesc because the tes...