Displaying 1 result from an estimated 1 matches for "pool_addr".
2009 Feb 17
1
[LLVMdev] ARM backend playing with alternative jump table implementations
...dd r3, pc, #PCRELV0
// ldr pc, [r3, +r0, lsl #2]
// .LJTI9_0_0:
// .long .LBB9_2
// .long .LBB9_5
// .long .LBB9_7
// .long .LBB9_4
// .long .LBB9_8
I would like to be able to change this to something like:
ldr r3, .POOL_ADDR
ldr pc, [r3, +r0, lsl #2
.POOL_ADDR:
.text .LJTI9_0_0:
.data
.LJTI9_0_0:
.long .LBB9_2
.long .LBB9_5
.long .LBB9_7
.long .LBB9_4
.long .LBB9_8
.text
The code for the lowering lives mos...