search for: pointerwidth

...s.cpp.orig 2013-08-18 12:00:04.501402572 +0000 +++ ./tools/clang/lib/Basic/Targets.cpp 2013-08-18 12:08:11.086175660 +0000 @@ -2384,6 +2384,14 @@ Builder.defineMacro("__amd64"); Builder.defineMacro("__x86_64"); Builder.defineMacro("__x86_64__"); + if (PointerWidth == 64 && getLongWidth() == 64) { + Builder.defineMacro("_LP64"); + Builder.defineMacro("__LP64__"); + } else if (PointerWidth == 32 && getLongWidth() == 32 && + getIntWidth() == 32) { + Builder.defineMacro("_ILP32&q...

Hi, I'm working on bringing up complete coverage for a Gentoo x32 "desktop" system. I've been cooking up quite a few patches for various packages to push upstream, but right now, the biggest blocker is the lack of support for building with/codegen targeting x32 in llvm/clang. Since the x32 patches were sent last year, I see support code has landed in LLVM, and basic handling of

...s.cpp.orig 2013-08-18 12:00:04.501402572 +0000 +++ ./tools/clang/lib/Basic/Targets.cpp 2013-08-18 12:08:11.086175660 +0000 @@ -2384,6 +2384,14 @@ Builder.defineMacro("__amd64"); Builder.defineMacro("__x86_64"); Builder.defineMacro("__x86_64__"); + if (PointerWidth == 64 && getLongWidth() == 64) { + Builder.defineMacro("_LP64"); + Builder.defineMacro("__LP64__"); + } else if (PointerWidth == 32 && getLongWidth() == 32 && + getIntWidth() == 32) { + Builder.defineMacro("_ILP32&q...

Try $ llvm-ld test.bc I don't know exactly how instrcombine works, but looks like it is trying to combine two GEPs into one, and while creating the new one it is passing i16 as type of index args. (as PointerWidth on pic16 is i16). // Find out whether the last index in the source GEP is a sequential idx. bool EndsWithSequential = false; for (gep_type_iterator I = gep_type_begin(*cast<User>(PtrOp)), E = gep_type_end(*cast<User>(PtrOp)); I != E; ++I) EndsWithSequent...

This patch adds EmitTypeAuxAttribute() function to CGDebugInfo, which allows other parts of clang issue auxiliary information through an enumeration type in Dwarf information. For example, by calling DI->EmitTypeAuxAttribute(type, "ID", 1234); We can get following information in dwarf: <1><3f>: Abbrev Number: 3 (DW_TAG_structure_type) <40> DW_AT_name

...are aligned to 16 bytes. On the LLVM backend, this creates bigger than necessary frame index offsets, which are undesirable for my architecture. As a side note, my target machine is 16 bits, so I have already modified ‘TargetInfo.ccp' with 16 bit ints and pointers, which works like a charm PointerWidth = PointerAlign = 16; IntWidth = IntAlign = 16; The Question is: - How do I make CLang to emit code with smaller array alignment, say 2 or 4 byte aligned arrays? - Otherwise, is there a way to override that alignment on the LLVM backend implementation, particularly to get it create frame index o...