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...ded instructions > #define CPU_MODE_SSEFP 16 // SSE FP modes, mainly support for xmm registers > #define CPU_MODE_SSE2 32 // Intel SSE2 instructions > #define CPU_MODE_ALTIVEC 64 // PowerPC Altivec support. You may wish to save space for PNI. http://cedar.intel.com/media/pdf/PNI_LEGAL3.pdf Likewise, all that branching is probably going to cause more trouble than it saves. Try this: vector float a0 = vec_ld( 0, a ); vector float a1 = vec_ld( 15, a ); vector float b0 = vec_ld( 0, b ); vector float b1 = vec_ld( 15, b ); a0 = vec_perm( a0,...

So we ran the code on a Windows XP based Atholon XP system and the xmm registers work just fine so it appears that Windows 2000 and below does not support them. We agree on not supporting the non-FP version, however the run time flags need to be settable with a non FP SSE mode so that exceptions are avoided. I thus propose a set of defines like this instead of the ones in our initial patch: