Displaying 4 results from an estimated 4 matches for "pmu_queu".
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pmu_queue
2015 Mar 11
3
[PATCH] pmu/gk20a: PMU boot support.
...ATE_FREE;
+ seq->desc = PMU_INVALID_SEQ_DESC;
+ seq->callback = NULL;
+ seq->cb_params = NULL;
+ seq->msg = NULL;
+ seq->out_payload = NULL;
+ seq->in_gk20a.alloc.dmem.size = 0;
+ seq->out_gk20a.alloc.dmem.size = 0;
+ clear_bit(seq->id, pmu->pmu_seq_tbl);
+}
+
+static int pmu_queue_init(struct pmu_desc *pmu,
+ u32 id, struct pmu_init_msg_pmu_gk20a *init)
+{
+ struct nvkm_pmu *ppmu = (void *)nvkm_pmu((void *)
+ impl_from_pmu(pmu));
+ struct pmu_queue *queue = &pmu->queue[id];
+
+ queue->id = id;
+ queue->index = init->queue_info[id].index;
+ queue->off...
2015 Mar 11
0
[PATCH] pmu/gk20a: PMU boot support.
...seq->cb_params = NULL;
> + seq->msg = NULL;
> + seq->out_payload = NULL;
> + seq->in_gk20a.alloc.dmem.size = 0;
> + seq->out_gk20a.alloc.dmem.size = 0;
> + clear_bit(seq->id, pmu->pmu_seq_tbl);
> +}
> +
> +static int pmu_queue_init(struct pmu_desc *pmu,
> + u32 id, struct pmu_init_msg_pmu_gk20a *init)
> +{
> + struct nvkm_pmu *ppmu = (void *)nvkm_pmu((void *)
> + impl_from_pmu(pmu));
> + struct pmu_queue *queue = &pmu->queue[id];
> +
> + queue->...
2015 Mar 12
2
[PATCH] pmu/gk20a: PMU boot support.
...seq->cb_params = NULL;
> + seq->msg = NULL;
> + seq->out_payload = NULL;
> + seq->in_gk20a.alloc.dmem.size = 0;
> + seq->out_gk20a.alloc.dmem.size = 0;
> + clear_bit(seq->id, pmu->pmu_seq_tbl);
> +}
> +
> +static int pmu_queue_init(struct pmu_desc *pmu,
> + u32 id, struct pmu_init_msg_pmu_gk20a *init)
> +{
> + struct nvkm_pmu *ppmu = (void *)nvkm_pmu((void *)
> + impl_from_pmu(pmu));
> + struct pmu_queue *queue = &pmu->queue[id];
> +
> + queue->...
2016 Nov 21
33
[PATCH v4 0/33] Secure Boot refactoring / signed PMU firmware support for GM20B
This revision includes initial signed PMU firmware support for GM20B
(Tegra X1). This PMU code will also be used as a basis for dGPU signed
PMU firmware support.
With the PMU code, the refactoring of secure boot should also make
more sense.
ACR (secure boot) support is now separated by the driver version it
originates from. This separation allows to run any version of the ACR
on any chip,