Displaying 4 results from an estimated 4 matches for "pmu_enable_irq".
2015 Apr 08
3
[PATCH V2] pmu/gk20a: PMU boot support.
...+		if (nv_wait(ppmu, 0x0010a10c, 0x00000006, 0x00000000))
+			return 0;
+		nv_mask(pmc, 0x00000200, 0x2000, 0x00000000);
+		nv_error(ppmu, "Falcon mem scrubbing timeout\n");
+		return -ETIMEDOUT;
+	} else {
+		nv_mask(pmc, 0x00000200, 0x2000, 0x00000000);
+		return 0;
+	}
+}
+static void
+pmu_enable_irq(struct nvkm_pmu *ppmu, struct nvkm_mc *pmc, bool enable)
+{
+	if (enable) {
+		nv_debug(ppmu, "enable pmu irq\n");
+		nv_wr32(ppmu, 0x0010a010, 0xff);
+		nv_mask(pmc, 0x00000640, 0x1000000, 0x1000000);
+		nv_mask(pmc, 0x00000644, 0x1000000, 0x1000000);
+	} else {
+		nv_debug(ppmu, "d...
2015 Mar 11
0
[PATCH] pmu/gk20a: PMU boot support.
...r(ppmu, "timeout waiting pmu idle : 0x%08x",
> +                                 idle_stat);
> +                       return -EBUSY;
> +               }
> +               usleep_range(100, 200);
> +       } while (1);
> +
> +       return 0;
> +}
> +
> +void pmu_enable_irq(struct nvkm_pmu *ppmu, struct nvkm_mc *pmc,
> +                       bool enable)
> +{
> +
> +       nv_wr32(pmc, 0x00000640,
> +               nv_rd32(pmc, 0x00000640) &
> +               ~0x1000000);
> +       nv_wr32(pmc, 0x00000644,
> +               nv_rd32(pmc, 0x...
2015 Mar 11
3
[PATCH] pmu/gk20a: PMU boot support.
...amp;&
+			((idle_stat >> 1) & 0x7fff) == 0) {
+			break;
+		}
+
+		if (time_after_eq(jiffies, end_jiffies)) {
+			nv_error(ppmu, "timeout waiting pmu idle : 0x%08x",
+				  idle_stat);
+			return -EBUSY;
+		}
+		usleep_range(100, 200);
+	} while (1);
+
+	return 0;
+}
+
+void pmu_enable_irq(struct nvkm_pmu *ppmu, struct nvkm_mc *pmc,
+			bool enable)
+{
+
+	nv_wr32(pmc, 0x00000640,
+		nv_rd32(pmc, 0x00000640) &
+		~0x1000000);
+	nv_wr32(pmc, 0x00000644,
+		nv_rd32(pmc, 0x00000644) &
+		~0x1000000);
+	nv_wr32(ppmu, 0x0010a014, 0xff);
+
+	if (enable) {
+		nv_debug(ppmu, "en...
2015 Mar 12
2
[PATCH] pmu/gk20a: PMU boot support.
...r(ppmu, "timeout waiting pmu idle : 0x%08x",
> +                                 idle_stat);
> +                       return -EBUSY;
> +               }
> +               usleep_range(100, 200);
> +       } while (1);
> +
> +       return 0;
> +}
> +
> +void pmu_enable_irq(struct nvkm_pmu *ppmu, struct nvkm_mc *pmc,
> +                       bool enable)
> +{
> +
> +       nv_wr32(pmc, 0x00000640,
> +               nv_rd32(pmc, 0x00000640) &
> +               ~0x1000000);
> +       nv_wr32(pmc, 0x00000644,
> +               nv_rd32(pmc, 0x...