search for: pmu_desc

...'x' || strings[i + 1] == 'X') { + *hex_pos = i; + return true; + } + } + *hex_pos = -1; + return false; +} +static int falc_trace_show(struct seq_file *s, void *data) +{ + struct nvkm_pmu *ppmu = s->private; + struct nvkm_pmu_impl *impl = (void *)nv_oclass(ppmu); + struct pmu_desc *pmu = &impl->pmudata; + u32 i = 0, j = 0, k, l, m; + char part_str[40]; + u32 data1; + char *log_data = kmalloc(GK20A_PMU_TRACE_BUFSIZE, GFP_KERNEL); + char *trace = log_data; + u32 *trace1 = (u32 *)log_data; + for (i = 0; i < GK20A_PMU_TRACE_BUFSIZE; i += 4) { + data1 = nv_ro32(pmu-&gt...

...} > + } > + *hex_pos = -1; > + return false; > +} > +static int falc_trace_show(struct seq_file *s, void *data) > +{ > + struct nvkm_pmu *ppmu = s->private; > + struct nvkm_pmu_impl *impl = (void *)nv_oclass(ppmu); > + struct pmu_desc *pmu = &impl->pmudata; > + u32 i = 0, j = 0, k, l, m; > + char part_str[40]; > + u32 data1; > + char *log_data = kmalloc(GK20A_PMU_TRACE_BUFSIZE, GFP_KERNEL); > + char *trace = log_data; > + u32 *trace1 = (u32 *)log_data; > + for...

...} > + } > + *hex_pos = -1; > + return false; > +} > +static int falc_trace_show(struct seq_file *s, void *data) > +{ > + struct nvkm_pmu *ppmu = s->private; > + struct nvkm_pmu_impl *impl = (void *)nv_oclass(ppmu); > + struct pmu_desc *pmu = &impl->pmudata; > + u32 i = 0, j = 0, k, l, m; > + char part_str[40]; > + u32 data1; > + char *log_data = kmalloc(GK20A_PMU_TRACE_BUFSIZE, GFP_KERNEL); > + char *trace = log_data; > + u32 *trace1 = (u32 *)log_data; > + for...

This revision includes initial signed PMU firmware support for GM20B (Tegra X1). This PMU code will also be used as a basis for dGPU signed PMU firmware support. With the PMU code, the refactoring of secure boot should also make more sense. ACR (secure boot) support is now separated by the driver version it originates from. This separation allows to run any version of the ACR on any chip,