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...Andrew Trickatrick at apple.com Mon May 20 10:36:00 PDT 2013 Previous message: [LLVMdev] Loop rotation and loop inversion in LLVM? Next message: [LLVMdev] Vararg Intrinsics still supported? Messages sorted by:[ date ][ thread ][ subject ][ author ] On May 16, 2013, at 5:07 PM, Paul Sokolovsky <pmiscml at gmail.com> wrote: > Hello, >> I'd be interested in knowing which pass performs loop inversion, i.e. > transforms while loop into do/while wrapped with if. So, it's pretty > easy to understand concept, http://en.wikipedia.org/wiki/Loop_inversion> provides description...

...ee if wrapper around it. So, can anyone suggest if LLVM loop rotation is related to loop inversion in Wikipedia terms, and if not, what it is. And I hope that this feedback will allow maintainers to make documentation clearer and more user-friendly. Thanks, Paul mailto:pmiscml at gmail.com

...instead comment like "; <label>:3" is as helpful and non-confusing as dumping tmp var names as: /* temporary 1 */ = tail call i32 @bar(i32 %a) (assuming LLVM syntax would have stream-type comments besides line-type ";"). Thanks, Paul mailto:pmiscml at gmail.com

...mewhere in target-independent code generator, can someone give a pointer to the code (and docs on this specific matter if any, because that's rather important machine-specific optimization topic IMHO, if you step aside from 32bit world). -- Best regards, Paul mailto:pmiscml at gmail.com

On Mon, May 13, 2013 at 5:31 PM, Paul Sokolovsky <pmiscml at gmail.com> wrote: > Hello, > > I only recently started to look at LLVM assembly generated by Clang, > and one of the first thing I saw was like: > > define i32 @foo(i32 %a, i32 %b) nounwind { > %1 = tail call i32 @bar(i32 %a) nounwind > %2 = icmp eq i32 %1, 0 >...

...ous stages of transforming to machine code. However, I wasn't able to find a way to render complete DAG visualization of normal IR - which besides CFG would also show dataflow (and other flows, if any). What people use to visualize such structure? Thanks, Paul mailto:pmiscml at gmail.com

...msp430 happily adds i128 values (with awful optimization though, like spilling values having backing store instead of rematerializing them). To trace thru "expand" operations, undocumented (?) -debug switch can be passed to llc. -- Best regards, Paul mailto:pmiscml at gmail.com

You can get the name of a variable by using the method getName() of llvm::Value. However it returns a blank string if the variable is a numbered variable, such as %11. How can I make it return %11 in such case. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20130222/d6d434e8/attachment.html>

Hello > I'm trying to understand how fitting source integer type width into > target machine register width happens. My reading on LLVM > codegeneration topics (few megabytes) so far didn't have this topic > mentioned explicitly. This is done during DAG Legalization phase. The operation is splitted into two (ADD + ADDC / ADDE). These DAG nodes are later matches during

...ast few releases, LLVM just loses machine backends, and there're few backends lying around which are of the form of whole LLVM trees, so it complicates maintenance and integration of them for people who are not deeply familiar with LLVM. -- Best regards, Paul mailto:pmiscml at gmail.com

Hi, On 02/24/2013 06:39 PM, Paul Sokolovsky wrote: > Hello, > > LLVM provides several ways to visual IR structure straight in its core - > Function::viewCFG() to render control flow graph, then -view-* options > to llc to render various stages of transforming to machine code. > However, I wasn't able to find a way to render complete DAG > visualization of normal IR -

...e to post a patch soon). I hope to do more detailed and formal roundtrip comparisons on the larger code corpus and report results later (if someone can suggest a utility to perform fuzzy graph isomorphism checks, that would be appreciated). -- Best regards, Paul mailto:pmiscml at gmail.com

...eam, so would appreciate comments on the idea, approach, and early implementation available so far. Please note that branches above will be rebased as I'm striving to provide clean patchset. (Btw, did you guys consider switching to git?) -- Best regards, Paul mailto:pmiscml at gmail.com

...t way or handle all cases (so far testing on trivial examples of course), so if your app in open source, definitely would be nice to look at. What I have on my hands so far: http://postimage.org/image/j4opcf4xf/ > Cheers, > Sebastian -- Best regards, Paul mailto:pmiscml at gmail.com

The Sparc port is maybe the closest thing to a text book example at this time. You can study it; debug some examples and trace through things. It's very simple because nobody is working on the Sparc port to make it a commercial compiler for the Sparc platform; yet at the same time it has complex patterns, custom inserters etc and all the elements of a more serious port. Most people learn

Hello everyone! Is there any documentation about LLVM backend implementation, except "Writing an LLVM backend"? I'm trying to write InstrFormats.td and InstrInfo.td for my backend now. After reading "Writing an LLVM backend" and "Creating an LLVM Backend for the Cpu0 Architecture", many black holes have remained. These tutorials describe it on concrete examples,