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...IRC. Karol Herbst (1): pll/gk104: fix PLL instability due to bad configuration with gddr5 drm/nouveau/nvkm/subdev/clk/Kbuild | 1 + drm/nouveau/nvkm/subdev/clk/pll.h | 5 +++ drm/nouveau/nvkm/subdev/clk/pllgk104.c | 77 ++++++++++++++++++++++++++++++++++ drm/nouveau/nvkm/subdev/clk/pllgt215.c | 6 +++ drm/nouveau/nvkm/subdev/fb/ramgk104.c | 39 +++++++---------- 5 files changed, 105 insertions(+), 23 deletions(-) create mode 100644 drm/nouveau/nvkm/subdev/clk/pllgk104.c -- 2.6.1

This series does some refactoring in the GK20A's volt and clk drivers (fixing a few things while we are at it) to let GM20B benefit from the GK20A's logic with which it is compatible. GM20B is capable of more sophisticated (and power-efficient) reclocking which will follow later. Even after this more fancy reclocking is merged, the present logic will remain used in the lowest speedo of