search for: pkwy

Displaying 20 results from an estimated 162 matches for "pkwy".

2008 Nov 18
3
[LLVMdev] 32 bit boolean results
Is there a way to tell LLVM to treat Boolean results as 32bit values instead of 1 bit values? Thanks, Micah Villmow Systems Engineer Advanced Technology & Performance Advanced Micro Devices Inc. 4555 Great America Pkwy, Santa Clara, CA. 95054 P: 408-572-6219 F: 408-572-6596 -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20081118/22e42263/attachment.html>
2008 Sep 10
3
[LLVMdev] Determining the names of all the functions in a module
...der files but I cannot determine how to extract the function name from either a Function object or a Module. Any tips or ideas would be greatly appreciated. Thanks, Micah Villmow Systems Engineer Advanced Technology & Performance Advanced Micro Devices Inc. 4555 Great America Pkwy, Santa Clara, CA. 95054 P: 408-572-6219 F: 408-572-6596 -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20080910/a356143b/attachment.html>
2001 Nov 09
1
Fix to track-kameipv6 branch for socket.c
...resses if getaddr succeeds. Any comments on this please email me directly because I do not belong to this mailing list. The reason I fixed this is because the rsync RPM that comes with Red Hat 7.2 contained the IPV6 patch in it. Later, John John Villalovos Intel Corporation 15220 NW GREENBRIER PKWY # CO5-162 BEAVERTON, OR 97006-5762 (503) 677-5777 Fax: (503) 677-6670 GPG 1.+/PGP 5.+/ DSS/Diffie Helman http://www.sodarock.com/JohnVillalovos-gpgkey.txt 1024D/1A25D86C 2F24 AD89 E5D5 C92B 7FE2 F878 7ED5 2D38 1A25 D86C -------------- next part -------------- A non-text attachment was scrubbe...
2008 Sep 23
2
[LLVMdev] Determining the register type of a MachineOperand
...what type of register(i.e. i32, f32, etc..) I am accessing from a MachineOperand? I.e. how do I get to the MVT struct, or equivalent information, from a MachineOperand object? Micah Villmow Systems Engineer Advanced Technology & Performance Advanced Micro Devices Inc. 4555 Great America Pkwy, Santa Clara, CA. 95054 P: 408-572-6219 F: 408-572-6596 -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20080923/3aa3e5c0/attachment.html>
2017 Jul 19
5
Cron sending to root after changing MAILTO
...# Settings for the CRON daemon. # CRONDARGS= : any extra command-line startup arguments for crond CRONDARGS= --- Chad Cordero Information Technology Consultant Enterprise & Cloud Services Information Technology Services California State University, San Bernardino 5500 University Pkwy San Bernardino, CA 92407-2393 Main Line: 909/537-7677 Direct Line: 909/537-7281 Fax: 909/537-7141 http://support.csusb.edu/ --- Disclaimer: This e-mail message is for the sole use of the intended recipient(s) and may contain confidential and privileged information protected from disclosure....
2008 Sep 25
2
[LLVMdev] Going from argument to register and back
...of the time with the current set of assumptions, but I would rather determine it dynamically so that I can change my assumptions and still get the right results. Thanks, Micah Villmow Systems Engineer Advanced Technology & Performance Advanced Micro Devices Inc. 4555 Great America Pkwy, Santa Clara, CA. 95054 P: 408-572-6219 F: 408-572-6596 -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20080925/ee679c43/attachment.html>
2008 Oct 20
2
[LLVMdev] Virtual Register allocation across functions
...n be saved across functions so that if I create a new virtual register in a function that it doesn't use a virtual register allocated in any previous function? Thanks, Micah Villmow Systems Engineer Advanced Technology & Performance Advanced Micro Devices Inc. 4555 Great America Pkwy, Santa Clara, CA. 95054 P: 408-572-6219 F: 408-572-6596 -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20081020/935040b8/attachment.html>
2008 Oct 24
2
[LLVMdev] SetCC tablegen pattern
...o, why is it assumed that all comparison results are always integers? If I put GPRI32 as my destination register, it complains about register classes not matching...... Micah Villmow Systems Engineer Advanced Technology & Performance Advanced Micro Devices Inc. 4555 Great America Pkwy, Santa Clara, CA. 95054 P: 408-572-6219 F: 408-572-6596 -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20081024/67643599/attachment.html>
2008 Nov 18
0
[LLVMdev] 32 bit boolean results
...gt; instead of 1 bit values? LLVM IR doesn't have a concept of C level booleans. What problem are you trying to solve? -Chris > > Thanks, > > Micah Villmow > Systems Engineer > Advanced Technology & Performance > Advanced Micro Devices Inc. > 4555 Great America Pkwy, > Santa Clara, CA. 95054 > P: 408-572-6219 > F: 408-572-6596 > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev -------------- next...
2008 Oct 14
3
[LLVMdev] CFG modifcations and code gen
...ewExitPath, false); newExitPath->moveAfter(pHigh); root->getParent()->RenumberBlocks(); So what am I doing wrong? Thanks, Micah Villmow Systems Engineer Advanced Technology & Performance Advanced Micro Devices Inc. 4555 Great America Pkwy, Santa Clara, CA. 95054 P: 408-572-6219 F: 408-572-6596 -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20081013/13c37349/attachment.html> -------------- next part -------------- A non-text attachment...
2008 Sep 15
3
[LLVMdev] Bad legalization?
...l = tail call i32 (...)* @abs( i32 %x ) ; <i32> [#uses=1] store i32 %call, i32 addrspace(11)* %result ret void } declare i32 @abs(...) Micah Villmow Systems Engineer Advanced Technology & Performance Advanced Micro Devices Inc. 4555 Great America Pkwy, Santa Clara, CA. 95054 P: 408-572-6219 F: 408-572-6596 -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20080915/d841b24f/attachment.html>
2017 Jul 19
3
Cron sending to root after changing MAILTO
I have ?root: ecssupport at csusb.edu? in my /etc/aliases file already. --- Chad Cordero Information Technology Consultant Enterprise & Cloud Services Information Technology Services California State University, San Bernardino 5500 University Pkwy San Bernardino, CA 92407-2393 Main Line: 909/537-7677 Direct Line: 909/537-7281 Fax: 909/537-7141 http://support.csusb.edu/ --- Disclaimer: This e-mail message is for the sole use of the intended recipient(s) and may contain confidential and privileged information protected from disclosure....
2008 Oct 22
2
[LLVMdev] Register class conversions
...and not the smaller type. So is it possible to have the register class I have setup for i32 type be automatically converted to the generic register type instead of aborting? Micah Villmow Systems Engineer Advanced Technology & Performance Advanced Micro Devices Inc. 4555 Great America Pkwy, Santa Clara, CA. 95054 P: 408-572-6219 F: 408-572-6596 -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20081022/d53d42b0/attachment.html>
2008 Sep 17
2
[LLVMdev] store addrspace qualifier
...I'm guessing) Operand 3 is undef So, how do I find out the address space? The reason being different address spaces are accessed with different registers. Thanks, Micah Villmow Systems Engineer Advanced Technology & Performance Advanced Micro Devices Inc. 4555 Great America Pkwy, Santa Clara, CA. 95054 P: 408-572-6219 F: 408-572-6596 -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20080917/91bcec74/attachment.html>
2008 Oct 28
4
[LLVMdev] Using patterns inside patterns
Is there currently a way to use a pattern inside of another pattern? Micah Villmow Systems Engineer Advanced Technology & Performance Advanced Micro Devices Inc. 4555 Great America Pkwy, Santa Clara, CA. 95054 P: 408-572-6219 F: 408-572-6596 -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20081028/bbaf0b9a/attachment.html>
2008 Oct 14
0
[LLVMdev] CFG modifcations and code gen
...ExitPath->moveAfter(pHigh); > root->getParent()->RenumberBlocks(); > > So what am I doing wrong? > > Thanks, > > > Micah Villmow > Systems Engineer > Advanced Technology & Performance > Advanced Micro Devices Inc. > 4555 Great America Pkwy, > Santa Clara, CA. 95054 > P: 408-572-6219 > F: 408-572-6596 > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev -------------- next...
2008 Sep 22
1
[LLVMdev] Tablegen address space
Is there a known way to get pattern matching on the address space from tablegen? Micah Villmow Systems Engineer Advanced Technology & Performance Advanced Micro Devices Inc. 4555 Great America Pkwy, Santa Clara, CA. 95054 P: 408-572-6219 F: 408-572-6596 -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20080922/bab04a8c/attachment.html>
2008 Sep 23
1
[LLVMdev] Tablegen strings
...ch against src0_neg instead of just src0. Where can I find the rules for the string pattern matcher so that I can added arbitrary strings into my definition. Thanks, Micah Villmow Systems Engineer Advanced Technology & Performance Advanced Micro Devices Inc. 4555 Great America Pkwy, Santa Clara, CA. 95054 P: 408-572-6219 F: 408-572-6596 -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20080923/81d8bfb0/attachment.html>
2008 Sep 24
0
[LLVMdev] Determining the register type of a MachineOperand
...etc..) I am > accessing from a MachineOperand? I.e. how do I get to the MVT > struct, or equivalent information, from a MachineOperand object? > > Micah Villmow > Systems Engineer > Advanced Technology & Performance > Advanced Micro Devices Inc. > 4555 Great America Pkwy, > Santa Clara, CA. 95054 > P: 408-572-6219 > F: 408-572-6596 > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev -------------- next...
2008 Oct 23
1
[LLVMdev] Tablegen and data type support
Is there a way for tablegen to generate patterns for all the data types of a specific register class instead of just the first one? Micah Villmow Systems Engineer Advanced Technology & Performance Advanced Micro Devices Inc. 4555 Great America Pkwy, Santa Clara, CA. 95054 P: 408-572-6219 F: 408-572-6596 -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20081023/8378fa2b/attachment.html>