search for: pipe_transfer

...p; NOUVEAU_TEXTURE_USAGE_LINEAR) { tx->direct = true; tx->surface = pscreen->get_tex_surface(pscreen, pt, - 0, 0, 0, + face, level, zslice, pipe_transfer_buffer_flags(&tx->base)); return &tx->base; } @@ -80,10 +84,12 @@ nv04_transfer_new(struct pipe_screen *pscreen, struct pipe_texture *pt, return NULL; } - tx->base.stride = ((struct nv04_miptree*)tx_tex)->level[0].pitch; + tx->base.stride = ((struct nv04_miptree*)...

...p; NOUVEAU_TEXTURE_USAGE_LINEAR) { tx->direct = true; tx->surface = pscreen->get_tex_surface(pscreen, pt, - 0, 0, 0, + face, level, zslice, pipe_transfer_buffer_flags(&tx->base)); return &tx->base; } @@ -80,10 +84,12 @@ nv04_transfer_new(struct pipe_screen *pscreen, struct pipe_texture *pt, return NULL; } - tx->base.stride = ((struct nv04_miptree*)tx_tex)->level[0].pitch; + tx->base.stride = ((struct nv04_miptree*)...

..._buffer.c b/src/gallium/drivers/nouveau/nouveau_buffer.c index 2db538c..2af6c5f 100644 --- a/src/gallium/drivers/nouveau/nouveau_buffer.c +++ b/src/gallium/drivers/nouveau/nouveau_buffer.c @@ -380,6 +380,7 @@ nouveau_buffer_transfer_map(struct pipe_context *pipe, struct pipe_transfer **ptransfer) { struct nouveau_context *nv = nouveau_context(pipe); + struct nouveau_screen *screen = nv->screen; struct nv04_resource *buf = nv04_resource(resource); struct nouveau_transfer *tx = MALLOC_STRUCT(nouveau_transfer); uint8_t *map; @@ -426,15 +427,20 @@ nouveau_buff...

...ipe, } static void +nvc0_clear_buffer_cpu(struct pipe_context *pipe, + struct pipe_resource *res, + unsigned offset, unsigned size, + const void *data, int data_size) +{ + struct nv04_resource *buf = nv04_resource(res); + struct pipe_transfer *pt; + struct pipe_box box; + unsigned elements, i; + + elements = size / data_size; + + u_box_1d(0, size, &box); + + uint8_t *map = buf->vtbl->transfer_map(pipe, res, 0, PIPE_TRANSFER_WRITE, + &box, &pt); + + for (i = 0; i <...

...ipe, } static void +nvc0_clear_buffer_cpu(struct pipe_context *pipe, + struct pipe_resource *res, + unsigned offset, unsigned size, + const void *data, int data_size) +{ + struct nv04_resource *buf = nv04_resource(res); + struct pipe_transfer *pt; + struct pipe_box box; + unsigned elements, i; + + elements = size / data_size; + + u_box_1d(0, size, &box); + + uint8_t *tf_map = buf->vtbl->transfer_map(pipe, res, + 0, PIPE_TRANSFER_WRITE, &box, &pt); + + for (i = 0; i < elements ; ++i) { + m...

Hi, please review the following patch! Thanks, Tobias Klausmann

...; + > +static void * > +tegra_transfer_map(struct pipe_context *pcontext, > + struct pipe_resource *presource, > + unsigned level, > + unsigned usage, > + const struct pipe_box *box, > + struct pipe_transfer **ptransfer) > +{ > + struct tegra_resource *resource = to_tegra_resource(presource); > + struct tegra_context *context = to_tegra_context(pcontext); > + struct tegra_transfer *transfer; > + > + transfer = calloc(1, sizeof(*transfer)); > + if (!tra...

...igned size, + const void *data, int data_size) +{ + // FIXME: Find a way to do this with the GPU! + + struct nvc0_context *nvc0 = nvc0_context(pipe); + struct nouveau_pushbuf *push = nvc0->base.pushbuf; + struct nv04_resource *buf = nv04_resource(res); + + struct pipe_transfer *pt; + struct pipe_box pb; + unsigned elements, i; + union pipe_color_union color; + + if (buf->fence_wr && !nouveau_fence_signalled(buf->fence_wr)) + nouveau_fence_wait(buf->fence_wr); + + memcpy(&color.ui, data, 12); + memset(&color.ui[3], 0, 4);...

...egra_context(pcontext); + + context->gpu->flush_resource(context->gpu, resource->gpu); +} + +static void * +tegra_transfer_map(struct pipe_context *pcontext, + struct pipe_resource *presource, + unsigned level, + unsigned usage, + const struct pipe_box *box, + struct pipe_transfer **ptransfer) +{ + struct tegra_resource *resource = to_tegra_resource(presource); + struct tegra_context *context = to_tegra_context(pcontext); + struct tegra_transfer *transfer; + + transfer = calloc(1, sizeof(*transfer)); + if (!transfer) + return NULL; + + transfer->map = context->gpu-&gt...

...} +/* Creates a cache in system memory of the buffer data. */ static boolean nouveau_buffer_cache(struct nouveau_context *nv, struct nv04_resource *buf) { @@ -317,6 +327,10 @@ nouveau_buffer_cache(struct nouveau_context *nv, struct nv04_resource *buf) #define NOUVEAU_TRANSFER_DISCARD \ (PIPE_TRANSFER_DISCARD_RANGE | PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) +/* Checks whether it is possible to completely discard the memory backing this + * resource. This can be useful if we would otherwise have to wait for a read + * operation to complete on this data. + */ static INLINE boolean nouveau_buffer_...

From: Ben Skeggs <bskeggs at redhat.com> Signed-off-by: Ben Skeggs <bskeggs at redhat.com> --- src/gallium/drivers/nouveau/nv50/g80_defs.xml.h | 279 ++++++++++++++++++++++++ 1 file changed, 279 insertions(+) create mode 100644 src/gallium/drivers/nouveau/nv50/g80_defs.xml.h diff --git a/src/gallium/drivers/nouveau/nv50/g80_defs.xml.h

Hello, I have my work on the nv vpe video decoder in a functional state. In case you didn't know this decoder accelerates mpeg2 video at the idct/mc level. I have verified that it works on nv40 hardware. I believe it works on nv30 hardware (and maybe some earlier hardware), but I cannot verify since I have none. I will reply with patches against the kernel, drm, ddx and mesa for