search for: pipe_texture_2d

Displaying 11 results from an estimated 11 matches for "pipe_texture_2d".

2014 Sep 01
0
[PATCH] nvc0: don't make 1d staging textures linear
...4 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_miptree.c +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_miptree.c @@ -261,7 +261,6 @@ nvc0_miptree_create(struct pipe_screen *pscreen, if (pt->usage == PIPE_USAGE_STAGING) { switch (pt->target) { - case PIPE_TEXTURE_1D: case PIPE_TEXTURE_2D: case PIPE_TEXTURE_RECT: if (pt->last_level == 0 && -- 1.8.5.5
2016 Feb 15
2
[PATCH 23/23] nvc0: implement support for maxwell texture headers
...ew->pipe.u.tex.last_layer - view->pipe.u.tex.first_layer + 1; > + } > + tic[1] = address; > + tic[2] |= address >> 32; > + > + switch (target) { > + case PIPE_TEXTURE_1D: > + tic[4] |= GM107_TIC2_4_TEXTURE_TYPE_ONE_D; > + break; > + case PIPE_TEXTURE_2D: > + tic[4] |= GM107_TIC2_4_TEXTURE_TYPE_TWO_D; > + break; > + case PIPE_TEXTURE_RECT: > + tic[4] |= GM107_TIC2_4_TEXTURE_TYPE_TWO_D; > + break; > + case PIPE_TEXTURE_3D: > + tic[4] |= GM107_TIC2_4_TEXTURE_TYPE_THREE_D; > + break; > + c...
2016 Feb 15
0
[PATCH 23/23] nvc0: implement support for maxwell texture headers
...ayer * mt->layer_stride; + depth = view->pipe.u.tex.last_layer - view->pipe.u.tex.first_layer + 1; + } + tic[1] = address; + tic[2] |= address >> 32; + + switch (target) { + case PIPE_TEXTURE_1D: + tic[4] |= GM107_TIC2_4_TEXTURE_TYPE_ONE_D; + break; + case PIPE_TEXTURE_2D: + tic[4] |= GM107_TIC2_4_TEXTURE_TYPE_TWO_D; + break; + case PIPE_TEXTURE_RECT: + tic[4] |= GM107_TIC2_4_TEXTURE_TYPE_TWO_D; + break; + case PIPE_TEXTURE_3D: + tic[4] |= GM107_TIC2_4_TEXTURE_TYPE_THREE_D; + break; + case PIPE_TEXTURE_CUBE: + depth /= 6; +...
2016 Feb 15
0
[PATCH 23/23] nvc0: implement support for maxwell texture headers
...>pipe.u.tex.first_layer + 1; >> + } >> + tic[1] = address; >> + tic[2] |= address >> 32; >> + >> + switch (target) { >> + case PIPE_TEXTURE_1D: >> + tic[4] |= GM107_TIC2_4_TEXTURE_TYPE_ONE_D; >> + break; >> + case PIPE_TEXTURE_2D: >> + tic[4] |= GM107_TIC2_4_TEXTURE_TYPE_TWO_D; >> + break; >> + case PIPE_TEXTURE_RECT: >> + tic[4] |= GM107_TIC2_4_TEXTURE_TYPE_TWO_D; >> + break; >> + case PIPE_TEXTURE_3D: >> + tic[4] |= GM107_TIC2_4_TEXTURE_TYPE_THREE_D; &...
2010 Jan 18
0
[PATCH] nv04-nv40: Rewrite and unify miptree and transfer code (v2)
...enable + || nouveau_screen(pt->screen)->device->chipset < 0x30 + || no_swizzle + + // disable swizzling for non-RGBA 2D because our current 2D code can't handle anything + // else correctly, and even that is semi-broken + || pt->target != PIPE_TEXTURE_2D + || (pt->format != PIPE_FORMAT_A8R8G8B8_UNORM && pt->format != PIPE_FORMAT_X8R8G8B8_UNORM) + ) + mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; + + /* non compressed formats with uniform pitch must be linear, and vice versa */ + if(!util_format_is_compressed(pt...
2018 Oct 19
13
[Bug 108500] New: Crash when creating a depth buffer on GeForce 320M
...lxgears: dri2.c:906: dri2_allocate_textures: Assertion `*zsbuf' failed. I debugged the assertion with gdb: templ structure contents passed to resource_create(): $2 = {reference = {count = 0}, width0 = 300, height0 = 300, depth0 = 1, array_size = 1, format = PIPE_FORMAT_Z24X8_UNORM, target = PIPE_TEXTURE_2D, last_level = 0, nr_samples = 0, nr_storage_samples = 0, usage = 0, bind = 1, flags = 0, next = 0x0, screen = 0x0} In nv50_miptree_create() in gallium/drivers/nouveau/nv50/nv50_miptree.c:389 the call to nouveau_bo_new() returns -22 that causes it to return NULL. MESA_DEBUG=1 glxgears prints th...
2015 Nov 12
9
[Bug 92922] New: Xorg random freeze
https://bugs.freedesktop.org/show_bug.cgi?id=92922 Bug ID: 92922 Summary: Xorg random freeze Product: xorg Version: unspecified Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW Severity: major Priority: medium Component: Driver/nouveau Assignee: nouveau at
2010 Jan 18
0
[PATCH] nv04-nv40: Rewrite and unify miptree and transfer code
...offset; -} - -static struct pipe_texture * -nv10_miptree_blanket(struct pipe_screen *pscreen, const struct pipe_texture *pt, - const unsigned *stride, struct pipe_buffer *pb) -{ - struct nv10_miptree *mt; - - /* Only supports 2D, non-mipmapped textures for the moment */ - if (pt->target != PIPE_TEXTURE_2D || pt->last_level != 0 || - pt->depth0 != 1) - return NULL; - - mt = CALLOC_STRUCT(nv10_miptree); - if (!mt) - return NULL; - - mt->base = *pt; - pipe_reference_init(&mt->base.reference, 1); - mt->base.screen = pscreen; - mt->level[0].pitch = stride[0]; - mt->level[0]...
2012 Jan 10
5
[PATCH 0/4] nvfx: rework render temps code and fixes
This patch series silences some unknown cap warnings and fixes up coding style (patch 1+4). The most important part of this series are the two patches in the middle. They rework the state_fb code, so that we are able to render to not 64 byte aligned targets, as this is the only real use-case for render temporaries this allows us to drop temp code completely and simplifies a lot
2010 Aug 06
4
nv vpe video decoder
Hello, I have my work on the nv vpe video decoder in a functional state. In case you didn't know this decoder accelerates mpeg2 video at the idct/mc level. I have verified that it works on nv40 hardware. I believe it works on nv30 hardware (and maybe some earlier hardware), but I cannot verify since I have none. I will reply with patches against the kernel, drm, ddx and mesa for
2016 Feb 15
24
[PATCH 01/23] nv50: import updated g80_defs.xml.h from rnndb
From: Ben Skeggs <bskeggs at redhat.com> Signed-off-by: Ben Skeggs <bskeggs at redhat.com> --- src/gallium/drivers/nouveau/nv50/g80_defs.xml.h | 279 ++++++++++++++++++++++++ 1 file changed, 279 insertions(+) create mode 100644 src/gallium/drivers/nouveau/nv50/g80_defs.xml.h diff --git a/src/gallium/drivers/nouveau/nv50/g80_defs.xml.h