search for: pipe_shader_vertex

Displaying 14 results from an estimated 14 matches for "pipe_shader_vertex".

2015 May 18
2
[PATCH] nvc0: fix context destruction for partly implemented tesselation
...ouveau/nvc0/nvc0_context.h b/src/gallium/drivers/nouveau/nvc0/nvc0_context.h index 09d08e4..f910541 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_context.h +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_context.h @@ -195,8 +195,8 @@ nvc0_shader_stage(unsigned pipe) { switch (pipe) { case PIPE_SHADER_VERTEX: return 0; -/* case PIPE_SHADER_TESSELLATION_CONTROL: return 1; */ -/* case PIPE_SHADER_TESSELLATION_EVALUATION: return 2; */ + case PIPE_SHADER_TESS_CTRL: return 1; + case PIPE_SHADER_TESS_EVAL: return 2; case PIPE_SHADER_GEOMETRY: return 3; case PIPE_SHADER_FRAGMENT: return 4; cas...
2009 Jun 21
0
[PATCH] nv50: add support for two-sided lighting
...->Semantic.SemanticIndex; switch (d->Semantic.SemanticName) { case TGSI_SEMANTIC_POSITION: depr = first; pc->p->cfg.fp.regs[2] |= 0x00000100; pc->p->cfg.fp.regs[3] |= 0x00000011; break; + case TGSI_SEMANTIC_COLOR: + if (pc->p->type == PIPE_SHADER_VERTEX) + fcol[c] = first; + break; + case TGSI_SEMANTIC_BCOLOR: + if (pc->p->type == PIPE_SHADER_VERTEX) + bcol[c] = first; + break; default: break; } @@ -1854,17 +1865,14 @@ nv50_program_tx_prep(struct nv50_pc *pc) break; } + c = d->Seman...
2009 Jun 24
0
[PATCH] nv50: fix previous patches
...t[i].hw) continue; out.hw = pc->result[i].rhw; emit_mov(pc, &out, &pc->result[i]); @@ -2337,7 +2349,7 @@ static void nv50_program_tx_postprocess(struct nv50_pc *pc) if (pc->p->type == PIPE_SHADER_FRAGMENT) nv50fp_move_outputs(pc); else - if (pc->p->type == PIPE_SHADER_VERTEX) + if (pc->p->type == PIPE_SHADER_VERTEX && pc->p->cfg.vp.ucp.nr > 0) nv50vp_ucp_append(pc); /* collect branching instructions, we need to adjust their target @@ -2811,14 +2823,26 @@ nv50_linkage_create(struct nv50_context *nv50) so_ref(so, &ln->so); so_ref(...
2009 Sep 12
0
[PATCH 10/13] nv50: proper linkage between VP and FP
...uld be loaded first */ - if (fcrd < 0x40) { - unsigned mask; - mid = 0; - mask = load_fp_attrib(pc, fcrd, &mid, &aid, - &oid); - pc->p->cfg.fp.regs[1] |= (mask << 24); - pc->p->cfg.fp.map[0] += 0x04040404 * fcrd; - } + if (p->type == PIPE_SHADER_VERTEX) { + int rid = 0; - /* should do MAD fcrd.xy, fcrd, SOME_CONST, fcrd */ - - if (perspect_loads) { - pc->iv_p = alloc_temp(pc, NULL); - - if (!(pc->p->cfg.fp.regs[1] & 0x08000000)) { - pc->p->cfg.fp.regs[1] |= 0x08000000; - pc->iv_p->rhw = aid++; - e...
2009 Sep 12
0
[PATCH 09/13] nv50: move allocation of pc regs
...;pc->attr[i], P_ATTR, i / 4, aid++); + pc->attr[i].hw = aid++; } } } if (pc->result_nr) { - unsigned nr = pc->result_nr * 4; - int rid = 0; - - pc->result = MALLOC(nr * sizeof(struct nv50_reg)); - if (!pc->result) - goto out_err; - if (pc->p->type == PIPE_SHADER_VERTEX) { - for (i = 0; i < nr; i++) - ctor_reg(&pc->result[i], P_RESULT, i / 4, i); + for (i = 0; i < pc->result_nr * 4; i++) + pc->result[i].hw = i; } else { - /* pc->p->type == PIPE_SHADER_FRAGMENT */ - for (i = 0; i < pc->result_nr; i++) { - for (c =...
2013 Dec 01
0
[PATCH] nv50: report 15 max inputs for fragment programs
...0_screen.c index 762b48f..e07ffb6 100644 --- a/src/gallium/drivers/nouveau/nv50/nv50_screen.c +++ b/src/gallium/drivers/nouveau/nv50/nv50_screen.c @@ -225,7 +225,7 @@ nv50_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader, case PIPE_SHADER_CAP_MAX_INPUTS: if (shader == PIPE_SHADER_VERTEX) return 32; - return 0x300 / 16; + return 15; case PIPE_SHADER_CAP_MAX_CONSTS: return 65536 / 16; case PIPE_SHADER_CAP_MAX_CONST_BUFFERS: -- 1.8.3.2
2009 Jun 21
0
[PATCH] nv50: don't allocate in the param buffer
...f (nouveau_resource_alloc(heap, p->param_nr, p, - &p->data[1])) - assert(0); - } - } - - start = p->data[1]->start; + /* we can use the whole buffer for parameters as we upload them + * all everytime anyway + */ + assert(p->param_nr <= 128); if (p->type == PIPE_SHADER_VERTEX) { count = p->param_nr - p->cfg.vp.ucp.nr * 4; @@ -2486,15 +2473,13 @@ nv50_program_validate_data(struct nv50_context *nv50, struct nv50_program *p) if (count) { float *map = pipe_buffer_map(pscreen, nv50->constbuf[p->type], PIPE_BUFFER_USAGE_CPU_READ); - nv50_progra...
2015 May 17
14
[PATCH 00/12] Tessellation support for nvc0
This is enough to enable tessellation support on nvc0. It seems to work a lot better on my GF108 than GK208. I suspect that there's some sort of scheduling shenanigans that need to be adjusted for kepler+. Or perhaps some shader header things. Even with the GF108, I still get occasional blue triangles in Heaven, but I get a *ton* of them on the GK208 -- seemingly the same issue, but it's
2014 Feb 21
0
[PATCH] nouveau: add a nouveau_compiler binary to compile TGSI into shader ISA
...rror reading file '%s'\n", filename); + return 1; + } + fclose(f); + + _debug_printf("Compiling for NV%X\n", chipset); + + if (!strncmp(text, "FRAG", 4)) + type = PIPE_SHADER_FRAGMENT; + else if (!strncmp(text, "VERT", 4)) + type = PIPE_SHADER_VERTEX; + else if (!strncmp(text, "GEOM", 4)) + type = PIPE_SHADER_GEOMETRY; + else if (!strncmp(text, "COMP", 4)) + type = PIPE_SHADER_COMPUTE; + else { + _debug_printf("Unrecognized TGSI header\n"); + return 1; + } + + if (!tgsi_text_translate(...
2013 Sep 10
3
[Bug 69155] New: codegen/nv50_ir_emit_nv50.cpp:169:srcAddr8: Assertion `(offset <= 0x1fc || offset == 0x3fc) && !(offset & 0x3)' failed.
https://bugs.freedesktop.org/show_bug.cgi?id=69155 Priority: medium Bug ID: 69155 Assignee: nouveau at lists.freedesktop.org Summary: codegen/nv50_ir_emit_nv50.cpp:169:srcAddr8: Assertion `(offset <= 0x1fc || offset == 0x3fc) && !(offset & 0x3)' failed. Severity: critical
2009 Jun 21
0
[PATCH] nv50: initial support for IF, ELSE, ENDIF insns
...e_prev = NULL; - unsigned pos; + struct nv50_program_exec *e, **e_list, *e_prev = NULL; + unsigned i, n, pos; if (pc->p->type == PIPE_SHADER_FRAGMENT) nv50fp_move_outputs(pc); @@ -2190,15 +2266,31 @@ static void nv50_program_tx_postprocess(struct nv50_pc *pc) if (pc->p->type == PIPE_SHADER_VERTEX) nv50vp_ucp_append(pc); + /* collect branching instructions, we need to adjust their target + * offsets when converting half insns + */ + e_list = MALLOC(pc->p->exec_size * sizeof(struct nv50_program_exec *)); + + for (n = 0, e = pc->p->exec_head; e; e = e->next) { + if (e-&g...
2015 Feb 23
2
[PATCH 1/2] nv50/ir: add fp64 support on G200 (NVA0)
...rs/nouveau/nv50/nv50_screen.c @@ -237,6 +237,8 @@ static int nv50_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader, enum pipe_shader_cap param) { + struct nouveau_device *dev = nouveau_screen(pscreen)->device; + switch (shader) { case PIPE_SHADER_VERTEX: case PIPE_SHADER_GEOMETRY: @@ -287,7 +289,9 @@ nv50_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader, case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS: return MIN2(32, PIPE_MAX_SAMPLERS); case PIPE_SHADER_CAP_DOUBLES: + return dev->chipset == 0xa0; case PIP...
2009 May 06
2
nv50: shader generation patches
Hi ! I've been trying to improve NV50 shader generation a bit the last couple of weeks, so here is what I've produced. I don't know if it's usable for you or just a pile of horrible hacks, but at least it makes some mesa demos render more correcly, p.e. the teapot (aside from mip-mapping issues of the floor texture), arbfplight, and I think the gears also didn't appear as they
2009 Dec 30
4
[PATCH 1/3] nv50: remove vtxbuf stateobject after a referenced vtxbuf is mapped
- This avoids problematic "reloc'ed while mapped" messages and some associated corruption as well. Signed-off-by: Maarten Maathuis <madman2003 at gmail.com> --- src/gallium/drivers/nouveau/nouveau_screen.c | 21 +++++++++++++++++++++ src/gallium/drivers/nouveau/nouveau_screen.h | 3 +++ src/gallium/drivers/nouveau/nouveau_stateobj.h | 13 +++++++++++++