search for: pipe_format

...formats in surface_fill. diff --git a/src/gallium/drivers/nv04/nv04_surface_2d.c b/src/gallium/drivers/nv04/nv04_surface_2d.c index 3193086..dfe30c0 100644 --- a/src/gallium/drivers/nv04/nv04_surface_2d.c +++ b/src/gallium/drivers/nv04/nv04_surface_2d.c @@ -34,26 +34,6 @@ nv04_surface_format(enum pipe_format format) } static INLINE int -nv04_rect_format(enum pipe_format format) -{ - switch (format) { - case PIPE_FORMAT_A8_UNORM: - return NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A8R8G8B8; - case PIPE_FORMAT_R5G6B5_UNORM: - case PIPE_FORMAT_A8L8_UNORM: - case PIPE_FORMAT_Z16_UNORM: - return NV04_GDI_REC...

..., but still not for the other ones. Makes me think this is a storage type/tiling-related situation. The blit code has this: /* Since shaders cannot export stencil, we cannot copy stencil values when * rendering to ZETA, so we attach the ZS surface to a colour render target. */ static INLINE enum pipe_format nv50_blit_zeta_to_colour_format(enum pipe_format format) Getting rid of that conversion naturally breaks stuff... by also hacking up nv50_blit_select_mode, I can restore it to a very similar broken mode as without the hackery (adding further hackery to force it to use zsbuf instead of cbuf breaks...

...) > { > - struct pipe_screen *pscreen = &r->nv30->screen->base.base; > + struct nv30_screen *screen = r->nv30->screen; > struct nv30_fragprog *fp = r->nv30->fragprog.program; > struct vertex_info *vinfo = &r->vertex_info; > enum pipe_format format; > uint emit = EMIT_OMIT; > uint result = *idx; > > - if (sem == TGSI_SEMANTIC_GENERIC && result >= 8) { > - for (result = 0; result < 8; result++) { > - if (fp->texcoord[result] == *idx) { > + if (sem == TGSI_SEMANTIC_GENER...

...een *pscreen = &r->nv30->screen->base.base; >>> + struct nv30_screen *screen = r->nv30->screen; >>> struct nv30_fragprog *fp = r->nv30->fragprog.program; >>> struct vertex_info *vinfo = &r->vertex_info; >>> enum pipe_format format; >>> uint emit = EMIT_OMIT; >>> uint result = *idx; >>> - if (sem == TGSI_SEMANTIC_GENERIC && result >= 8) { >>> - for (result = 0; result < 8; result++) { >>> - if (fp->texcoord[result] == *idx) { &g...

...unsigned offset, unsigned size, + const void *data, int data_size) +{ + struct nvc0_context *nvc0 = nvc0_context(pipe); + struct nouveau_pushbuf *push = nvc0->base.pushbuf; + struct nv04_resource *buf = nv04_resource(res); + union pipe_color_union color; + enum pipe_format dst_fmt; + unsigned width, height, elements; + + assert(res->target == PIPE_BUFFER); + assert(nouveau_bo_memtype(buf->bo) == 0); + + switch (data_size) { + case 16: + dst_fmt = PIPE_FORMAT_R32G32B32A32_UINT; + memcpy(&color.ui, data, 16); + break; + case 12: +...

...unsigned offset, unsigned size, + const void *data, int data_size) +{ + struct nvc0_context *nvc0 = nvc0_context(pipe); + struct nouveau_pushbuf *push = nvc0->base.pushbuf; + struct nv04_resource *buf = nv04_resource(res); + union pipe_color_union color; + enum pipe_format dst_fmt; + unsigned width, height, elements; + + assert(res->target == PIPE_BUFFER); + assert(nouveau_bo_memtype(buf->bo) == 0); + + switch (data_size) { + case 16: + dst_fmt = PIPE_FORMAT_R32G32B32A32_UINT; + memcpy(&color.ui, data, 16); + break; + case 12: +...

Hi, please review the following patch! Thanks, Tobias Klausmann

...I added Z32_FLOAT to show the tile_flags the various formats need in the page tables. There'd also be Z32_FLOAT_S8_UNORM (0x19, tile flags 0xe000), but that's not yet defined in the pipe formats header, and I actually don't know if it's even possbible to define that cleanly the way pipe_format is laid out. Christoph -------------- next part -------------- An embedded and charset-unspecified text was scrubbed... Name: 0001-nv50-correct-zeta-formats.patch Url: http://lists.freedesktop.org/archives/nouveau/attachments/20090704/87c7d232/attachment.ksh

...seem necessary, so we might be better off trying the simplest approach first. I suspect it would work. ...Unless you already tried it and it didn't work, in which case I'd be interested to see what the PGRAPH errors are. @@ -51,6 +53,10 @@ static INLINE int nv04_scaled_image_format(enum pipe_format format) { switch (format) { + case PIPE_FORMAT_A8_UNORM: + case PIPE_FORMAT_L8_UNORM: + case PIPE_FORMAT_I8_UNORM: - return NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A8R8G8B8; + return NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_Y8; case PIPE_FORMAT_A1R5G5B5_UNORM: return NV04_SCALED_IMAGE_FROM...

This makes the vertex buffer go to GART, not VRAM, and redoes the mapping to not use the UNSYNCHRONIZED access (which is meaningless on a VRAM buffer anyways). While we're at it, add some flushes for VBO data. Moving the vertex buffer from VRAM to GART makes glxgears work fully with NV30_SWTNL=1. The other changes just seem like a good idea. I'm not sure *why* moving the buffer from VRAM

...unsigned offset, unsigned size, + const void *data, int data_size) +{ + struct nvc0_context *nvc0 = nvc0_context(pipe); + struct nouveau_pushbuf *push = nvc0->base.pushbuf; + struct nv04_resource *buf = nv04_resource(res); + + union pipe_color_union color; + enum pipe_format dst_fmt; + unsigned width, height, elements; + + assert(res->target == PIPE_BUFFER); + assert(nouveau_bo_memtype(buf->bo) == 0); + + switch (data_size) { + case 16: + dst_fmt = PIPE_FORMAT_R32G32B32A32_UINT; + memcpy(&color.ui, data, 16); + break; +...

There were reports of issues with gallium-nine. It's unclear whether mesa/st uses these, the patches did not produce any piglit changes. However they seem right... Ilia Mirkin (2): nv50,nvc0: add missing depth/stencil formats to tile flag selection nv50,nvc0: fix 3d blit logic for odd depth/stencil formats src/gallium/drivers/nouveau/nv50/nv50_blit.h | 21 ++++++++++++++-------

...z, 0, U_##u \ > + NV50_TIC_0_FMT_##sz, U_##u \ > } > > #define C4A(p, n, r, g, b, a, t, s, u, br) \ > @@ -308,6 +304,10 @@ const struct nv50_format > nv50_format_table[PIPE_FORMAT_COUNT] = > I3B(R32G32B32X32_SINT, RGBX32_SINT, C0, C1, C2, xx, SINT, 32_32_32_32, > TR), > I3B(R32G32B32X32_UINT, RGBX32_UINT, C0, C1, C2, xx, UINT, 32_32_32_32, > TR), > > + F3A(R32G32B32_FLOAT, NONE, C0, C1, C2, xx, FLOAT, 32_32_32, tV), > + I3A(R32G32B32_SINT, NO...

...\ - NV50_TIC_0_FMT_##sz, 0, U_##u \ + NV50_TIC_0_FMT_##sz, U_##u \ } #define C4A(p, n, r, g, b, a, t, s, u, br) \ @@ -308,6 +304,10 @@ const struct nv50_format nv50_format_table[PIPE_FORMAT_COUNT] = I3B(R32G32B32X32_SINT, RGBX32_SINT, C0, C1, C2, xx, SINT, 32_32_32_32, TR), I3B(R32G32B32X32_UINT, RGBX32_UINT, C0, C1, C2, xx, UINT, 32_32_32_32, TR), + F3A(R32G32B32_FLOAT, NONE, C0, C1, C2, xx, FLOAT, 32_32_32, tV), + I3A(R32G32B32_SINT, NONE, C0, C1, C2, xx, SINT, 32_32_3...

Hello, I have my work on the nv vpe video decoder in a functional state. In case you didn't know this decoder accelerates mpeg2 video at the idct/mc level. I have verified that it works on nv40 hardware. I believe it works on nv30 hardware (and maybe some earlier hardware), but I cannot verify since I have none. I will reply with patches against the kernel, drm, ddx and mesa for

...truct nv84_decoder *dec = (struct nv84_decoder *)decoder; > + struct nv84_video_buffer *target = (struct nv84_video_buffer *)video_target; > + > + struct pipe_mpeg12_picture_desc *desc = (struct pipe_mpeg12_picture_desc *)picture; > + > + assert(target->base.buffer_format == PIPE_FORMAT_NV12); This can be written as assert(video_target->buffer_format == PIPE_FORMAT_NV12); > + > + vl_mpg12_bs_decode(dec->mpeg12_bs, > + video_target, > + desc, > + num_buffers, > + data,...

...r *template); + +int +nv84_screen_get_video_param(struct pipe_screen *pscreen, + enum pipe_video_profile profile, + enum pipe_video_cap param); + +boolean +nv84_screen_video_supported(struct pipe_screen *screen, + enum pipe_format format, + enum pipe_video_profile profile); + #endif diff --git a/src/gallium/drivers/nv50/nv50_miptree.c b/src/gallium/drivers/nv50/nv50_miptree.c index 036f1c7..28be768 100644 --- a/src/gallium/drivers/nv50/nv50_miptree.c +++ b/src/gallium/drivers/nv50/nv50_miptree.c @...

...dec = (struct nv84_decoder *)decoder; >> + struct nv84_video_buffer *target = (struct nv84_video_buffer *)video_target; >> + >> + struct pipe_mpeg12_picture_desc *desc = (struct pipe_mpeg12_picture_desc *)picture; >> + >> + assert(target->base.buffer_format == PIPE_FORMAT_NV12); > This can be written as > assert(video_target->buffer_format == PIPE_FORMAT_NV12); Good point. The code was a bit different at an earlier point. > >> + >> + vl_mpg12_bs_decode(dec->mpeg12_bs, >> + video_target, >> +...

...r *template); + +int +nv84_screen_get_video_param(struct pipe_screen *pscreen, + enum pipe_video_profile profile, + enum pipe_video_cap param); + +boolean +nv84_screen_video_supported(struct pipe_screen *screen, + enum pipe_format format, + enum pipe_video_profile profile); + #endif diff --git a/src/gallium/drivers/nv50/nv50_miptree.c b/src/gallium/drivers/nv50/nv50_miptree.c index 036f1c7..28be768 100644 --- a/src/gallium/drivers/nv50/nv50_miptree.c +++ b/src/gallium/drivers/nv50/nv50_miptree.c @...

...ecoder *)decoder; >>> + struct nv84_video_buffer *target = (struct nv84_video_buffer *)video_target; >>> + >>> + struct pipe_mpeg12_picture_desc *desc = (struct pipe_mpeg12_picture_desc *)picture; >>> + >>> + assert(target->base.buffer_format == PIPE_FORMAT_NV12); >> This can be written as >> assert(video_target->buffer_format == PIPE_FORMAT_NV12); > > Good point. The code was a bit different at an earlier point. > >> >>> + >>> + vl_mpg12_bs_decode(dec->mpeg12_bs, >>> +...