search for: pipe_box

...lear_buffer_cpu(struct pipe_context *pipe, + struct pipe_resource *res, + unsigned offset, unsigned size, + const void *data, int data_size) +{ + struct nv04_resource *buf = nv04_resource(res); + struct pipe_transfer *pt; + struct pipe_box box; + unsigned elements, i; + + elements = size / data_size; + + u_box_1d(0, size, &box); + + uint8_t *map = buf->vtbl->transfer_map(pipe, res, 0, PIPE_TRANSFER_WRITE, + &box, &pt); + + for (i = 0; i < elements; ++i) + me...

...lear_buffer_cpu(struct pipe_context *pipe, + struct pipe_resource *res, + unsigned offset, unsigned size, + const void *data, int data_size) +{ + struct nv04_resource *buf = nv04_resource(res); + struct pipe_transfer *pt; + struct pipe_box box; + unsigned elements, i; + + elements = size / data_size; + + u_box_1d(0, size, &box); + + uint8_t *tf_map = buf->vtbl->transfer_map(pipe, res, + 0, PIPE_TRANSFER_WRITE, &box, &pt); + + for (i = 0; i < elements ; ++i) { + memcpy(&tf_map[i*data_...

Hi, please review the following patch! Thanks, Tobias Klausmann

...->domain == NOUVEAU_BO_VRAM) { if (usage & NOUVEAU_TRANSFER_DISCARD) { /* Set up a staging area for the user to write to. It will be copied @@ -492,8 +507,14 @@ nouveau_buffer_transfer_flush_region(struct pipe_context *pipe, const struct pipe_box *box) { struct nouveau_transfer *tx = nouveau_transfer(transfer); + struct nv04_resource *buf = nv04_resource(transfer->resource); + if (tx->map) nouveau_transfer_write(nouveau_context(pipe), tx, box->x, box->width); + + util_range_add(&buf->valid_buffer_range...

...const void *data, int data_size) +{ + // FIXME: Find a way to do this with the GPU! + + struct nvc0_context *nvc0 = nvc0_context(pipe); + struct nouveau_pushbuf *push = nvc0->base.pushbuf; + struct nv04_resource *buf = nv04_resource(res); + + struct pipe_transfer *pt; + struct pipe_box pb; + unsigned elements, i; + union pipe_color_union color; + + if (buf->fence_wr && !nouveau_fence_signalled(buf->fence_wr)) + nouveau_fence_wait(buf->fence_wr); + + memcpy(&color.ui, data, 12); + memset(&color.ui[3], 0, 4); + + elements = size...

Hi All, Here is a bunch of fixes for nv30 cards, the first patch is a resend of a patch I send a while back. AFAICT that one is ready for merging, but it is not entirely clear to me what the process is for getting (nouveau) mesa patches merged. Should I request commit rights, and push my own patches once they have been reviewed ? Regards, Hans

...ait(mt->base.fence_wr, &nvc0->base.debug); } -void * -nvc0_miptree_transfer_map(struct pipe_context *pctx, - struct pipe_resource *res, - unsigned level, - unsigned usage, - const struct pipe_box *box, - struct pipe_transfer **ptransfer) +static void * +nvc0_miptree_transfer_map_unlocked( + struct pipe_context *pctx, + struct pipe_resource *res, + unsigned level, + unsigned usage, + const struct pipe_box *box, + struct pipe_transfer **p...

...ontext->gpu, resource->gpu); > +} > + > +static void * > +tegra_transfer_map(struct pipe_context *pcontext, > + struct pipe_resource *presource, > + unsigned level, > + unsigned usage, > + const struct pipe_box *box, > + struct pipe_transfer **ptransfer) > +{ > + struct tegra_resource *resource = to_tegra_resource(presource); > + struct tegra_context *context = to_tegra_context(pcontext); > + struct tegra_transfer *transfer; > + > + transfer =...

...egra_context *context = to_tegra_context(pcontext); + + context->gpu->flush_resource(context->gpu, resource->gpu); +} + +static void * +tegra_transfer_map(struct pipe_context *pcontext, + struct pipe_resource *presource, + unsigned level, + unsigned usage, + const struct pipe_box *box, + struct pipe_transfer **ptransfer) +{ + struct tegra_resource *resource = to_tegra_resource(presource); + struct tegra_context *context = to_tegra_context(pcontext); + struct tegra_transfer *transfer; + + transfer = calloc(1, sizeof(*transfer)); + if (!transfer) + return NULL; + + trans...

This patch series silences some unknown cap warnings and fixes up coding style (patch 1+4). The most important part of this series are the two patches in the middle. They rework the state_fb code, so that we are able to render to not 64 byte aligned targets, as this is the only real use-case for render temporaries this allows us to drop temp code completely and simplifies a lot

https://bugs.freedesktop.org/show_bug.cgi?id=102349 Bug ID: 102349 Summary: nv4x crashing with plasmashell - gdb log included Product: xorg Version: unspecified Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW Severity: blocker Priority: medium Component: Driver/nouveau

...nouveau_fence_ref(nv->fence.current, &dst->fence_wr); src->status |= NOUVEAU_BUFFER_STATUS_GPU_READING; - nouveau_fence_ref(nv->screen->fence.current, &src->fence); + nouveau_fence_ref(nv->fence.current, &src->fence); } else { struct pipe_box src_box; src_box.x = srcx; @@ -787,7 +787,7 @@ nouveau_buffer_migrate(struct nouveau_context *nv, nouveau_bo_ref(NULL, &bo); if (mm) - release_allocation(&mm, screen->fence.current); + release_allocation(&mm, nv->fence.current); } else...

Signed-off-by: Maarten Lankhorst <maarten.lankhorst at canonical.com> --- src/gallium/drivers/nouveau/nouveau_fence.c | 76 ++++++++++++------------- src/gallium/drivers/nouveau/nouveau_fence.h | 22 +++++-- src/gallium/drivers/nouveau/nouveau_screen.c | 9 +++ src/gallium/drivers/nouveau/nouveau_screen.h | 14 ++--- src/gallium/drivers/nouveau/nv30/nv30_context.c | 4 +-

...ce.current, &dst->fence_wr); > > src->status |= NOUVEAU_BUFFER_STATUS_GPU_READING; > - nouveau_fence_ref(nv->screen->fence.current, &src->fence); > + nouveau_fence_ref(nv->fence.current, &src->fence); > } else { > struct pipe_box src_box; > src_box.x = srcx; > @@ -787,7 +787,7 @@ nouveau_buffer_migrate(struct nouveau_context *nv, > > nouveau_bo_ref(NULL, &bo); > if (mm) > - release_allocation(&mm, screen->fence.current); > + release_allocation(&mm, nv-...

Signed-off-by: Maarten Lankhorst <maarten.lankhorst at canonical.com> --- src/gallium/drivers/nouveau/nouveau_fence.c | 76 ++++++++++++------------- src/gallium/drivers/nouveau/nouveau_fence.h | 22 +++++-- src/gallium/drivers/nouveau/nouveau_screen.c | 9 +++ src/gallium/drivers/nouveau/nouveau_screen.h | 14 ++--- src/gallium/drivers/nouveau/nv30/nv30_context.c | 4