Displaying 20 results from an estimated 21 matches for "pipe_blit_info".
2014 Mar 06
0
[PATCH] nv50, nvc0: adjust blit_3d handling of ms output textures
...um/drivers/nouveau/nv50/nv50_surface.c b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
index dc6d628..6073deb 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_surface.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
@@ -977,6 +977,7 @@ nv50_blit_3d(struct nv50_context *nv50, const struct pipe_blit_info *info)
float x0, x1, y0, y1, z;
float dz;
float x_range, y_range;
+ float x_output, y_output;
blit->mode = nv50_blit_select_mode(info);
blit->color_mask = nv50_blit_derive_color_mask(info);
@@ -996,11 +997,14 @@ nv50_blit_3d(struct nv50_context *nv50, const struct pipe...
2014 Sep 19
2
[PATCH 0/2] nv50, nvc0: fix weirdo zs formats and their blits
There were reports of issues with gallium-nine. It's unclear whether mesa/st
uses these, the patches did not produce any piglit changes. However they seem
right...
Ilia Mirkin (2):
nv50,nvc0: add missing depth/stencil formats to tile flag selection
nv50,nvc0: fix 3d blit logic for odd depth/stencil formats
src/gallium/drivers/nouveau/nv50/nv50_blit.h | 21 ++++++++++++++-------
2014 May 18
0
[PATCH] nv50,nvc0: fix 3d blits with mipmap levels
...drivers/nouveau/nv50/nv50_surface.c b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
index d02f5fe..1f37527 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_surface.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
@@ -1142,6 +1142,12 @@ nv50_blit_3d(struct nv50_context *nv50, const struct pipe_blit_info *info)
y0 *= (float)(1 << nv50_miptree(src)->ms_y);
y1 *= (float)(1 << nv50_miptree(src)->ms_y);
+ /* XXX: multiply by 6 for cube arrays ? */
+ dz = (float)info->src.box.depth / (float)info->dst.box.depth;
+ z = (float)info->src.box.z;
+ if (nv50_miptree...
2015 Sep 07
2
[PATCH mesa 2/3] nv30: Fix color resolving for nv3x cards
...30_miptree.c
> index 76bb8b8..c240030 100644
> --- a/src/gallium/drivers/nouveau/nv30/nv30_miptree.c
> +++ b/src/gallium/drivers/nouveau/nv30/nv30_miptree.c
> @@ -149,6 +149,56 @@ static void
> nv30_resource_resolve(struct nv30_context *nv30,
> const struct pipe_blit_info *info)
> {
> + struct nv30_miptree *src_mt = nv30_miptree(info->src.resource);
> + struct nv30_rect src, dst;
> + unsigned x, x0, x1, y, y1, w, h;
> +
> + define_rect(info->src.resource, 0, info->src.box.z, info->src.box.x,
> + info->src.box.y, info...
2014 Mar 06
0
[RFC PATCH] nv50: adjust blit_3d logic
.../drivers/nouveau/nv50/nv50_surface.c b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
index dc6d628..216e667 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_surface.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
@@ -1069,7 +1069,7 @@ nv50_blit_3d(struct nv50_context *nv50, const struct pipe_blit_info *info)
PUSH_DATAf(push, y0);
PUSH_DATAf(push, z);
BEGIN_NV04(push, NV50_3D(VTX_ATTR_2F_X(0)), 2);
- PUSH_DATAf(push, 16384 << nv50_miptree(dst)->ms_x);
+ PUSH_DATAf(push, 16384/* << nv50_miptree(dst)->ms_x*/);
PUSH_DATAf(push, 0.0f);
BE...
2014 Apr 18
0
[PATCH] nv50: use 2d blit when src/dst have same number of samples
...ivers/nouveau/nv50/nv50_surface.c b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
index c28abe0..9a3548a 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_surface.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
@@ -1299,8 +1299,8 @@ nv50_blit_eng2d(struct nv50_context *nv50, const struct pipe_blit_info *info)
if (src->base.base.nr_samples > dst->base.base.nr_samples) {
/* center src coorinates for proper MS resolve filtering */
- srcx += (int64_t)src->ms_x << 32;
- srcy += (int64_t)src->ms_y << 32;
+ srcx += (int64_t)1 << (src->ms_x...
2015 Sep 07
5
[PATCH mesa 1/3] nv30: Fix max width / height checks in nv30 sifm code
The sifm object has a limit of 1024x1024 for its input size and 2048x2048
for its output. The code checking this was trying to be clever resulting
in it seeing a surface of e.g 1024x256 being outside of the input size
limit.
This commit fixes this.
Signed-off-by: Hans de Goede <hdegoede at redhat.com>
---
src/gallium/drivers/nouveau/nv30/nv30_transfer.c | 4 ++--
1 file changed, 2
2015 Sep 03
10
[PATCH mesa 0/4] nv30: Various fixes
Hi All,
Here is a bunch of fixes for nv30 cards, the first patch is a resend of
a patch I send a while back. AFAICT that one is ready for merging, but
it is not entirely clear to me what the process is for getting (nouveau)
mesa patches merged.
Should I request commit rights, and push my own patches once they have
been reviewed ?
Regards,
Hans
2015 Sep 09
3
[PATCH mesa v2 1/2] nv30: Fix color resolving for nv3x cards
...llium/drivers/nouveau/nv30/nv30_miptree.c
index 76bb8b8..735c718 100644
--- a/src/gallium/drivers/nouveau/nv30/nv30_miptree.c
+++ b/src/gallium/drivers/nouveau/nv30/nv30_miptree.c
@@ -149,14 +149,50 @@ static void
nv30_resource_resolve(struct nv30_context *nv30,
const struct pipe_blit_info *info)
{
+ struct nv30_miptree *src_mt = nv30_miptree(info->src.resource);
struct nv30_rect src, dst;
+ unsigned x, x0, x1, y, y1, w, h;
define_rect(info->src.resource, 0, info->src.box.z, info->src.box.x,
info->src.box.y, info->src.box.width, info->src.bo...
2015 Feb 14
0
[PATCH] nvc0: bail out of 2d blits with non-A8_UNORM alpha formats
...m/drivers/nouveau/nvc0/nvc0_surface.c b/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c
index 4130d36..4404d8c 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c
@@ -1401,11 +1401,14 @@ nvc0_blit(struct pipe_context *pipe, const struct pipe_blit_info *info)
} else
if (!nv50_2d_src_format_faithful(info->src.format)) {
if (!util_format_is_luminance(info->src.format)) {
+ if (!nv50_2d_dst_format_ops_supported(info->dst.format))
+ eng3d = TRUE;
+ else
if (util_format_...
2014 Oct 21
0
[PATCH v2] nv50: Handle ARB_conditional_render_inverted and enable it
...ivers/nouveau/nv50/nv50_surface.c b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
index e1dd6e0..e1d2b26 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_surface.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
@@ -1297,7 +1297,7 @@ nv50_blit_eng2d(struct nv50_context *nv50, const struct pipe_blit_info *info)
if (nv50->cond_query && info->render_condition_enable) {
BEGIN_NV04(push, NV50_2D(COND_MODE), 1);
- PUSH_DATA (push, NV50_2D_COND_MODE_RES_NON_ZERO);
+ PUSH_DATA (push, nv50->cond_condmode);
}
if (mask != 0xffffffff) {
--
2.1.2
2016 Jun 05
0
[RFC PATCH] nouveau: add locking
...uffer(struct pipe_context *pipe,
data, data_size);
}
+ pipe_mutex_unlock(nv50->screen->base.push_mutex);
+
nv50->dirty_3d |= NV50_NEW_3D_FRAMEBUFFER | NV50_NEW_3D_SCISSOR;
}
@@ -1700,6 +1729,8 @@ nv50_blit(struct pipe_context *pipe, const struct pipe_blit_info *info)
info->src.box.height != -info->dst.box.height))
eng3d = true;
+ pipe_mutex_lock(nv50->screen->base.push_mutex);
+
if (nv50->screen->num_occlusion_queries_active) {
BEGIN_NV04(push, NV50_3D(SAMPLECNT_ENABLE), 1);
PUSH_DATA (push, 0);
@@...
2014 Jun 17
2
[PATCH 1/3] nvc0: remove vport_int hack and instead use the usual state validation
...C0_NEW_TFB_TARGETS | NVC0_NEW_VERTEX | NVC0_NEW_ARRAYS);
nvc0->scissors_dirty |= 1;
+ nvc0->viewports_dirty |= 1;
nvc0->base.pipe.set_min_samples(&nvc0->base.pipe, blit->saved.min_samples);
}
@@ -1188,11 +1190,7 @@ nvc0_blit_3d(struct nvc0_context *nvc0, const struct pipe_blit_info *info)
nvc0_blitctx_post_blit(blit);
- /* restore viewport */
-
- BEGIN_NVC0(push, NVC0_3D(VIEWPORT_HORIZ(0)), 2);
- PUSH_DATA (push, nvc0->vport_int[0]);
- PUSH_DATA (push, nvc0->vport_int[1]);
+ /* restore viewport transform */
IMMED_NVC0(push, NVC0_3D(VIEWPORT_TRANSFO...
2014 Dec 31
0
[PATCH 2/2] nvc0: regenerate rnndb headers
...D_DST_FORMAT : NVC0_2D_SRC_FORMAT;
+ uint32_t mthd = dst ? NV50_2D_DST_FORMAT : NV50_2D_SRC_FORMAT;
uint32_t offset = mt->level[level].offset;
format = nvc0_2d_format(pformat, dst, dst_src_pformat_equal);
@@ -1214,10 +1214,10 @@ nvc0_blit_eng2d(struct nvc0_context *nvc0, const struct pipe_blit_info *info)
boolean b;
mode = nv50_blit_get_filter(info) ?
- NVC0_2D_BLIT_CONTROL_FILTER_BILINEAR :
- NVC0_2D_BLIT_CONTROL_FILTER_POINT_SAMPLE;
+ NV50_2D_BLIT_CONTROL_FILTER_BILINEAR :
+ NV50_2D_BLIT_CONTROL_FILTER_POINT_SAMPLE;
mode |= (src->base.base.nr_samples >...
2014 Nov 27
0
[Mesa-dev] [RFC] tegra: Initial support
...ra_context(pcontext);
> +
> + context->gpu->set_stream_output_targets(context->gpu, num_targets,
> + targets, offsets);
> +}
> +
> +static void
> +tegra_blit(struct pipe_context *pcontext,
> + const struct pipe_blit_info *pinfo)
> +{
> + struct tegra_context *context = to_tegra_context(pcontext);
> + struct pipe_blit_info info;
> +
> + if (pinfo) {
> + memcpy(&info, pinfo, sizeof(info));
> + info.dst.resource = tegra_resource_unwrap(info.dst.res...
2014 Dec 31
2
[PATCH 1/2] nv50: regenerate rnndb headers
...ivers/nouveau/nv50/nv50_surface.c b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
index e1d2b26..dc9852d 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_surface.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
@@ -1304,8 +1304,8 @@ nv50_blit_eng2d(struct nv50_context *nv50, const struct pipe_blit_info *info)
BEGIN_NV04(push, NV50_2D(ROP), 1);
PUSH_DATA (push, 0xca); /* DPSDxax */
BEGIN_NV04(push, NV50_2D(PATTERN_COLOR_FORMAT), 1);
- PUSH_DATA (push, NV50_2D_PATTERN_COLOR_FORMAT_32BPP);
- BEGIN_NV04(push, NV50_2D(PATTERN_COLOR(0)), 4);
+ PUSH_DATA (push, NV50_2...
2014 Nov 27
7
[RFC] tegra: Initial support
...t_target **targets,
+ const unsigned *offsets)
+{
+ struct tegra_context *context = to_tegra_context(pcontext);
+
+ context->gpu->set_stream_output_targets(context->gpu, num_targets,
+ targets, offsets);
+}
+
+static void
+tegra_blit(struct pipe_context *pcontext,
+ const struct pipe_blit_info *pinfo)
+{
+ struct tegra_context *context = to_tegra_context(pcontext);
+ struct pipe_blit_info info;
+
+ if (pinfo) {
+ memcpy(&info, pinfo, sizeof(info));
+ info.dst.resource = tegra_resource_unwrap(info.dst.resource);
+ info.src.resource = tegra_resource_unwrap(info.src.resource);
+ pin...
2014 Jun 17
0
[PATCH try 2 2/2] gallium/nouveau: move pushbuf and fences to context
...e_wr);
+ nouveau_fence_ref(nv50->base.fence.current, &buf->fence);
+ nouveau_fence_ref(nv50->base.fence.current, &buf->fence_wr);
nv50->dirty |= NV50_NEW_FRAMEBUFFER | NV50_NEW_SCISSOR;
}
@@ -1405,7 +1405,7 @@ nv50_blit_eng2d(struct nv50_context *nv50, const struct pipe_blit_info *info)
PUSH_DATA (push, srcy >> 32);
}
}
- nv50_bufctx_fence(nv50->bufctx, FALSE);
+ nv50_bufctx_fence(nv50, nv50->bufctx, FALSE);
nouveau_bufctx_reset(nv50->bufctx, NV50_BIND_2D);
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_vbo.c b/src/gallium...
2014 Jun 17
2
[PATCH try 2 1/2] gallium/nouveau: decouple nouveau_fence implementation from screen
Signed-off-by: Maarten Lankhorst <maarten.lankhorst at canonical.com>
---
src/gallium/drivers/nouveau/nouveau_fence.c | 76 ++++++++++++-------------
src/gallium/drivers/nouveau/nouveau_fence.h | 22 +++++--
src/gallium/drivers/nouveau/nouveau_screen.c | 9 +++
src/gallium/drivers/nouveau/nouveau_screen.h | 14 ++---
src/gallium/drivers/nouveau/nv30/nv30_context.c | 4 +-
2014 Jun 21
3
[Mesa-dev] [PATCH try 2 2/2] gallium/nouveau: move pushbuf and fences to context
...e_ref(nv50->base.fence.current, &buf->fence);
> + nouveau_fence_ref(nv50->base.fence.current, &buf->fence_wr);
>
> nv50->dirty |= NV50_NEW_FRAMEBUFFER | NV50_NEW_SCISSOR;
> }
> @@ -1405,7 +1405,7 @@ nv50_blit_eng2d(struct nv50_context *nv50, const struct pipe_blit_info *info)
> PUSH_DATA (push, srcy >> 32);
> }
> }
> - nv50_bufctx_fence(nv50->bufctx, FALSE);
> + nv50_bufctx_fence(nv50, nv50->bufctx, FALSE);
>
> nouveau_bufctx_reset(nv50->bufctx, NV50_BIND_2D);
>
> diff --git a/src/gallium/driv...