search for: pipe_bind_index_buff

The number of vertex buffers has nothing to do with the number of bound constbufs. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> Cc: "10.4 10.3" <mesa-stable at lists.freedesktop.org> --- src/gallium/drivers/nouveau/nv50/nv50_context.c | 5 +++-- src/gallium/drivers/nouveau/nvc0/nvc0_context.c | 4 +++- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git

The main patches are from Christoph. Unfortunately they're a little beyond my understanding of all the vertex-related details, but they generally seemed fine. I'm just going to push these unless someone steps up to review them. Christoph Bumiller (2): nvc0: add support for indirect drawing nvc0: fix translate path for PRIM_RESTART_WITH_DRAW_ARRAYS Ilia Mirkin (1): nouveau: check if

...rty based on the buffer's binding */ static void nouveau_buffer_transfer_unmap(struct pipe_context *pipe, @@ -540,8 +540,6 @@ nouveau_buffer_transfer_unmap(struct pipe_context *pipe, /* make sure we invalidate dedicated caches */ if (bind & (PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER)) nv->vbo_dirty = TRUE; - if (bind & (PIPE_BIND_CONSTANT_BUFFER)) - nv->cb_dirty = TRUE; } util_range_add(&buf->valid_buffer_range, diff --git a/src/gallium/drivers/nouveau/nouveau_context.h b/src/gallium/drivers/nouveau/nouveau_con...

New revision of this patchset that prevents VRAM objects from being allocated on VRAM-less systems like Tegra. This is required for Mesa to work on such systems. Changes since v2: - Use vram_size to detect systems without VRAM and set the correct domain instead of expecting each chip to set its domain explicitly. Alexandre Courbot (2): nouveau: support for custom VRAM domains nvc0: use

...;base.pushbuf; + struct nouveau_pushbuf *push = nv50->base.pushbuf; + struct nv50_screen *screen = nv50->screen; int ret; uint64_t tls_size; @@ -685,9 +637,6 @@ nv50_screen_create(struct nouveau_device *dev) screen->base.sysmem_bindings |= PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER; - screen->base.pushbuf->user_priv = screen; - screen->base.pushbuf->rsvd_kick = 5; - chan = screen->base.channel; pscreen->destroy = nv50_screen_destroy; @@ -714,20 +663,6 @@ nv50_screen_create(struct nouveau_device *dev) screen->base.base.is_video_for...

Signed-off-by: Maarten Lankhorst <maarten.lankhorst at canonical.com> --- src/gallium/drivers/nouveau/nouveau_fence.c | 76 ++++++++++++------------- src/gallium/drivers/nouveau/nouveau_fence.h | 22 +++++-- src/gallium/drivers/nouveau/nouveau_screen.c | 9 +++ src/gallium/drivers/nouveau/nouveau_screen.h | 14 ++--- src/gallium/drivers/nouveau/nv30/nv30_context.c | 4 +-

..._pushbuf *push = nv50->base.pushbuf; > + struct nv50_screen *screen = nv50->screen; > int ret; > uint64_t tls_size; > > @@ -685,9 +637,6 @@ nv50_screen_create(struct nouveau_device *dev) > screen->base.sysmem_bindings |= > PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER; > > - screen->base.pushbuf->user_priv = screen; > - screen->base.pushbuf->rsvd_kick = 5; > - > chan = screen->base.channel; > > pscreen->destroy = nv50_screen_destroy; > @@ -714,20 +663,6 @@ nv50_screen_create(struct nouveau_device *dev) >...

This series is to allow NVIDIA chips with shared memory to operate more efficiently (and to operate at all once we disable VRAM from the kernel driver) by allowing nouveau_screen to specify a domain to use for objects originally allocated into VRAM. If the domain is not overridden, the default NOUVEAU_BO_VRAM is used. A NV_VRAM_DOMAIN() macro is then introduced to be used in place of

Signed-off-by: Maarten Lankhorst <maarten.lankhorst at canonical.com> --- src/gallium/drivers/nouveau/nouveau_fence.c | 76 ++++++++++++------------- src/gallium/drivers/nouveau/nouveau_fence.h | 22 +++++-- src/gallium/drivers/nouveau/nouveau_screen.c | 9 +++ src/gallium/drivers/nouveau/nouveau_screen.h | 14 ++--- src/gallium/drivers/nouveau/nv30/nv30_context.c | 4