search for: picknode

...ve assumes that you're moving an unscheduled instruction, which should never be above InsertPos for top-down scheduling. If the instruction was in multiple ready Q's, then you may attempt to schedule it multiple times. You can avoid this by checking Su->isScheduled in your Strategy's pickNode. See InstructionShuffler::pickNode for an example. I don't see an equivalent check in ConvergingScheduler, but there probably should be. Another possibility to consider is something strange with DebugValues, which I haven't tested much. I reproduced the same assert on arm and filed PR1371...

...39;re moving an > unscheduled instruction, which should never be above InsertPos for top- > down scheduling. If the instruction was in multiple ready Q's, then you > may attempt to schedule it multiple times. You can avoid this by > checking Su->isScheduled in your Strategy's pickNode. See > InstructionShuffler::pickNode for an example. I don't see an equivalent > check in ConvergingScheduler, but there probably should be. > > Another possibility to consider is something strange with DebugValues, > which I haven't tested much. > > I reproduced the...

...> unscheduled instruction, which should never be above InsertPos for top- > > down scheduling. If the instruction was in multiple ready Q's, then you > > may attempt to schedule it multiple times. You can avoid this by > > checking Su->isScheduled in your Strategy's pickNode. See > > InstructionShuffler::pickNode for an example. I don't see an equivalent > > check in ConvergingScheduler, but there probably should be. > > > > Another possibility to consider is something strange with DebugValues, > > which I haven't tested much. >...

Andy, I've described that issue (see below) when you were out of town... I think I am getting more context on it. Please take a look... So, in short, when the new MI scheduler performs move of an instruction, it does something like this: // Move the instruction to its new location in the instruction stream. MachineInstr *MI = SU->getInstr(); if (IsTopNode) {

...39;re moving an > unscheduled instruction, which should never be above InsertPos for top- > down scheduling. If the instruction was in multiple ready Q's, then you > may attempt to schedule it multiple times. You can avoid this by > checking Su->isScheduled in your Strategy's pickNode. See > InstructionShuffler::pickNode for an example. I don't see an equivalent > check in ConvergingScheduler, but there probably should be. > > Another possibility to consider is something strange with DebugValues, > which I haven't tested much. > > I reproduced the sa...

...unscheduled instruction, which should never be above InsertPos for > > top- down scheduling. If the instruction was in multiple ready Q's, > > then you may attempt to schedule it multiple times. You can avoid > this > > by checking Su->isScheduled in your Strategy's pickNode. See > > InstructionShuffler::pickNode for an example. I don't see an > > equivalent check in ConvergingScheduler, but there probably should > be. > > > > Another possibility to consider is something strange with > DebugValues, > > which I haven't tested...

...m::RegPressureTracker::getMaxDownwardPressureDelta(llvm::MachineInstr const*, llvm::RegPressureDelta&, llvm::ArrayRef<llvm::PressureChange>, llvm::ArrayRef<unsigned int>) + 138 12 clang-3.5 0x0000000000e4c60f 13 clang-3.5 0x0000000000e4f066 llvm::ConvergingVLIWScheduler::pickNodeFromQueue(llvm::ReadyQueue&, llvm::RegPressureTracker const&, llvm::ConvergingVLIWScheduler::SchedCandidate&) + 284 14 clang-3.5 0x0000000000e4f2e5 llvm::ConvergingVLIWScheduler::pickNodeBidrectional(bool&) + 285 15 clang-3.5 0x0000000000e4f5b0 llvm::ConvergingVLIWSchedul...

...39;re moving an > unscheduled instruction, which should never be above InsertPos for top- > down scheduling. If the instruction was in multiple ready Q's, then you > may attempt to schedule it multiple times. You can avoid this by > checking Su->isScheduled in your Strategy's pickNode. See > InstructionShuffler::pickNode for an example. I don't see an equivalent > check in ConvergingScheduler, but there probably should be. > > Another possibility to consider is something strange with DebugValues, > which I haven't tested much. > > I reproduced the sa...

...truction, which should never be above InsertPos for >> > top- down scheduling. If the instruction was in multiple ready Q's, >> > then you may attempt to schedule it multiple times. You can avoid >> this >> > by checking Su->isScheduled in your Strategy's pickNode. See >> > InstructionShuffler::pickNode for an example. I don't see an >> > equivalent check in ConvergingScheduler, but there probably should >> be. >> > >> > Another possibility to consider is something strange with >> DebugValues, >> >...

...Delta(llvm::MachineInstr >> const*, llvm::RegPressureDelta&, llvm::ArrayRef<llvm::PressureChange>, >> llvm::ArrayRef<unsigned int>) + 138 >> 12 clang-3.5 0x0000000000e4c60f >> 13 clang-3.5 0x0000000000e4f066 >> llvm::ConvergingVLIWScheduler::pickNodeFromQueue(llvm::ReadyQueue&, >> llvm::RegPressureTracker const&, >> llvm::ConvergingVLIWScheduler::SchedCandidate&) + 284 >> 14 clang-3.5 0x0000000000e4f2e5 >> llvm::ConvergingVLIWScheduler::pickNodeBidrectional(bool&) + 285 >> 15 clang-3.5 0...

...gt;> > InsertPos for > >> > top- down scheduling. If the instruction was in multiple ready > Q's, > >> > then you may attempt to schedule it multiple times. You can avoid > >> this > >> > by checking Su->isScheduled in your Strategy's pickNode. See > >> > InstructionShuffler::pickNode for an example. I don't see an > >> > equivalent check in ConvergingScheduler, but there probably should > >> be. > >> > > >> > Another possibility to consider is something strange with > >&...

...> unscheduled instruction, which should never be above InsertPos for top- > > down scheduling. If the instruction was in multiple ready Q's, then you > > may attempt to schedule it multiple times. You can avoid this by > > checking Su->isScheduled in your Strategy's pickNode. See > > InstructionShuffler::pickNode for an example. I don't see an equivalent > > check in ConvergingScheduler, but there probably should be. > > > > Another possibility to consider is something strange with DebugValues, > > which I haven't tested much. >...

...egPressureDelta&, > llvm::ArrayRef<llvm::PressureChange>, > llvm::ArrayRef<unsigned int>) + 138 > 12 clang-3.5 0x0000000000e4c60f > 13 clang-3.5 0x0000000000e4f066 > llvm::ConvergingVLIWScheduler::pickNodeFromQueue(llvm::ReadyQueue&, > llvm::RegPressureTracker const&, > llvm::ConvergingVLIWScheduler::SchedCandidate&) + 284 > 14 clang-3.5 0x0000000000e4f2e5 > llvm::ConvergingVLIWScheduler::pickNodeBidrectional(bool&) + 2...

I was handed a makefile which is used to compile a library and was told to figure out why the compilation is failing. There is a lot of output and at this point I'm not sure what is important and what is not. I'm trying to solve this problem in small steps, so if asked I can certainly provide more information. The first error that I see during compilation is

...d bottom-up scheduling with live interval update. It divides the region into three zones: Top-scheduled, bottom-scheduled, and unscheduled. The ScheduleDAGMI constructor takes an instance of MachineSchedStrategy. This is currently a very simply interface that provides pickNode(), releaseTopNode(), releaseBottomNode(). The MachineScheduler is plugable at every level. 1. The pass itself is optional. Targets may disable or override it completely. For example, a target that implements global scheduling would need to override the standard pass. 2. Targets may create...

Hey Everyone, I'd like to begin a project to rework the scheduler to address some problems we've discovered on this end. The goal is to get a more configurable/flexible scheduler while simplifying maintenance by separating policy from implementation to get independent and interchangeable parts. This is going to be challenging because we are still stuck on LLVM 2.9. We will be upgrading