search for: pgt_bits

...offset = vma->node->offset + (delta >> 12); - u32 bits = vma->node->type - 12; - u32 num = length >> vma->node->type; + u32 shift = vma->node->type; + u32 order = PAGE_SHIFT - shift; + u32 num = length >> PAGE_SHIFT; u32 pde = (offset >> vmm->pgt_bits) - vm->fpde; - u32 pte = (offset & ((1 << vmm->pgt_bits) - 1)) >> bits; - u32 max = 1 << (vmm->pgt_bits - bits); - unsigned m, sglen; - u32 end, len; + u32 pte = offset & ((1 << vmm->pgt_bits) - 1); + u32 max = 1 << vmm->pgt_bits; + u32 end,...

...type; + int big = shift != vmm->spg_shift; u32 offset = vma->node->offset + (delta >> 12); - u32 bits = vma->node->type - 12; - u32 num = length >> vma->node->type; + u32 bits = shift - 12; + u32 num = length >> shift; u32 pde = (offset >> vmm->pgt_bits) - vm->fpde; u32 pte = (offset & ((1 << vmm->pgt_bits) - 1)) >> bits; u32 max = 1 << (vmm->pgt_bits - bits); @@ -98,7 +99,7 @@ nouveau_vm_map_sg_table(struct nouveau_vma *vma, u64 delta, u64 length, for_each_sg(mem->sg->sgl, sg, mem->sg->nents, i...

...2 offset = vma->node->offset + (delta >> 12); > > - u32 bits = vma->node->type - 12; > > - u32 num = length >> vma->node->type; > > + u32 bits = shift - 12; > > + u32 num = length >> shift; > > u32 pde = (offset >> vmm->pgt_bits) - vm->fpde; > > u32 pte = (offset & ((1 << vmm->pgt_bits) - 1)) >> bits; > > u32 max = 1 << (vmm->pgt_bits - bits); > > @@ -98,7 +99,7 @@ nouveau_vm_map_sg_table(struct nouveau_vma *vma, u64 delta, u64 length, > > > > for_each_...

...u32 bits = vma->node->type - 12; > - u32 num = length >> vma->node->type; > + u32 shift = vma->node->type; > + u32 order = PAGE_SHIFT - shift; > + u32 num = length >> PAGE_SHIFT; > u32 pde = (offset >> vmm->pgt_bits) - vm->fpde; > - u32 pte = (offset & ((1 << vmm->pgt_bits) - 1)) >> bits; > - u32 max = 1 << (vmm->pgt_bits - bits); > - unsigned m, sglen; > - u32 end, len; > + u32 pte = offset & ((1 << vmm->pgt_bits) - 1)...

...->spg_shift; > u32 offset = vma->node->offset + (delta >> 12); > - u32 bits = vma->node->type - 12; > - u32 num = length >> vma->node->type; > + u32 bits = shift - 12; > + u32 num = length >> shift; > u32 pde = (offset >> vmm->pgt_bits) - vm->fpde; > u32 pte = (offset & ((1 << vmm->pgt_bits) - 1)) >> bits; > u32 max = 1 << (vmm->pgt_bits - bits); > @@ -98,7 +99,7 @@ nouveau_vm_map_sg_table(struct nouveau_vma *vma, u64 delta, u64 length, > > for_each_sg(mem->sg->sgl, sg...

...hing, I want to make sure I'm not breaking everything > else...). > > Thus I assume that each "pte" in a "big" page table maps a page size > of 1 << vmm->lpg_shift, is that correct ? Correct, nv50+ are the only ones that support large pages. > vmm->pgt_bits is always the same however, thus I assume that PDEs always > map the same amount of space, but regions for large pages just have > fewer PTEs, which seem to correspond to what the code does here: > > u32 pte = (offset & ((1 << vmm->pgt_bits) - 1)) >> bits; > >...

...u/drm/nouveau/core/subdev/vm/base.c index 77c67fc..e66fb77 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/vm/base.c +++ b/drivers/gpu/drm/nouveau/core/subdev/vm/base.c @@ -362,7 +362,7 @@ nouveau_vm_create(struct nouveau_vmmgr *vmm, u64 offset, u64 length, vm->fpde = offset >> (vmm->pgt_bits + 12); vm->lpde = (offset + length - 1) >> (vmm->pgt_bits + 12); - vm->pgt = kcalloc(vm->lpde - vm->fpde + 1, sizeof(*vm->pgt), GFP_KERNEL); + vm->pgt = vzalloc((vm->lpde - vm->fpde + 1) * sizeof(*vm->pgt)); if (!vm->pgt) { kfree(vm); return -ENO...

...fset + (delta >> 12); >> > - u32 bits = vma->node->type - 12; >> > - u32 num = length >> vma->node->type; >> > + u32 bits = shift - 12; >> > + u32 num = length >> shift; >> > u32 pde = (offset >> vmm->pgt_bits) - vm->fpde; >> > u32 pte = (offset & ((1 << vmm->pgt_bits) - 1)) >> bits; >> > u32 max = 1 << (vmm->pgt_bits - bits); >> > @@ -98,7 +99,7 @@ nouveau_vm_map_sg_table(struct nouveau_vma *vma, u64 delta, u64 length, >> > &gt...

.../vm/base.c > index 77c67fc..e66fb77 100644 > --- a/drivers/gpu/drm/nouveau/core/subdev/vm/base.c > +++ b/drivers/gpu/drm/nouveau/core/subdev/vm/base.c > @@ -362,7 +362,7 @@ nouveau_vm_create(struct nouveau_vmmgr *vmm, u64 offset, u64 length, > vm->fpde = offset >> (vmm->pgt_bits + 12); > vm->lpde = (offset + length - 1) >> (vmm->pgt_bits + 12); > > - vm->pgt = kcalloc(vm->lpde - vm->fpde + 1, sizeof(*vm->pgt), GFP_KERNEL); > + vm->pgt = vzalloc((vm->lpde - vm->fpde + 1) * sizeof(*vm->pgt)); > if (!vm->pgt) { &gt...

Hi folks ! So I've been trying to figure out what it would take to make nouveau work properly on architectures where PAGE_SIZE isn't 4k such as most ppc64's. An initial patch from Dave fixed a bogon in nv41.c nv41_vm_map_sg() which was trying to handle the case at that low level, but this isn't enough, and after a bit of digging, I also think that's not the right approach:

...e pages (in card mmu) (though I assume big is always 0 on nv40 unless missed something, I want to make sure I'm not breaking everything else...). Thus I assume that each "pte" in a "big" page table maps a page size of 1 << vmm->lpg_shift, is that correct ? vmm->pgt_bits is always the same however, thus I assume that PDEs always map the same amount of space, but regions for large pages just have fewer PTEs, which seem to correspond to what the code does here: u32 pte = (offset & ((1 << vmm->pgt_bits) - 1)) >> bits; - My basic idea is to move...

Hi, Generally the the imported buffers which has memory type TTM_PL_TT are mapped as small pages probably due to lack of big page allocation. But the platform device which also use memory type TTM_PL_TT, like GK20A, can *allocate* big page though the IOMMU hardware inside the SoC. This is a try to map the imported buffers as big pages in GMMU by the platform IOMMU. With some preparation work to

...; + > + plat = nv_device_to_platform(nv_device(parent)); > + if (plat->gpu->iommu.domain) > + priv->base.iommu_capable = true; > + > + priv->base.limit = 1ULL << 40; > + priv->base.dma_bits = 40; > + priv->base.pgt_bits = 27 - 12; > + priv->base.spg_shift = 12; > + priv->base.lpg_shift = 17; > + priv->base.create = gf100_vm_create; > + priv->base.map_pgt = gf100_vm_map_pgt; > + priv->base.map = gf100_vm_map; > + priv->base.map_sg = gf100_vm_m...