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https://bugs.freedesktop.org/show_bug.cgi?id=92870 Bug ID: 92870 Summary: GF117M nvkm_pmu_pgob fault Product: xorg Version: unspecified Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW Severity: normal Priority: medium Component: Driver/nouveau Assignee: nouveau at lists.freedesktop.org...

...de09f0f310ac Author: Alexandre Courbot <acourbot at nvidia.com> Date: Thu Sep 3 17:39:52 2015 +0900 drm/nouveau/pmu: do not assume a PMU is present Some devices may not have a PMU. Avoid a NULL pointer dereference in such cases by checking whether the pointer given to nvkm_pmu_pgob() is valid. Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> Signed-off-by: Ben Skeggs <bskeggs at redhat.com> diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/base.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/base.c index 27a79c0..d95eb86 100644 --- a/drivers/...

...cf9 100644 > --- a/drm/nouveau/nvkm/engine/gr/gf100.c > +++ b/drm/nouveau/nvkm/engine/gr/gf100.c > @@ -1499,7 +1499,8 @@ gf100_gr_oneinit(struct nvkm_gr *base) > struct nvkm_device *device = gr->base.engine.subdev.device; > int ret, i, j; > > - nvkm_pmu_pgob(device->pmu, false); > + if (device->pmu) > + nvkm_pmu_pgob(device->pmu, false); I'd probably just change the condition in nvkm_pmu_pgob() to (pmu && pmu->func->pgob) ? > > ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST, 0x1000...

.../gf100.c >>> +++ b/drm/nouveau/nvkm/engine/gr/gf100.c >>> @@ -1499,7 +1499,8 @@ gf100_gr_oneinit(struct nvkm_gr *base) >>> struct nvkm_device *device = gr->base.engine.subdev.device; >>> int ret, i, j; >>> >>> - nvkm_pmu_pgob(device->pmu, false); >>> + if (device->pmu) >>> + nvkm_pmu_pgob(device->pmu, false); >> I'd probably just change the condition in nvkm_pmu_pgob() to (pmu && >> pmu->func->pgob) ? > > It seems logical to me that the c...

On 12/22/2014 05:11 PM, Vince Hsu wrote: > The platform device does not use the common nouveau_pwr_init() to initialize > the PWR, but it does need the .prob() be assigned to avoid NULL pointer > dereference in graph/nve4.c. s/prob/pgob/ :-( Will fix in next version. > > Signed-off-by: Vince Hsu <vinceh at nvidia.com> > --- > > v2: this patch is added since v2. (v1 is the RFC actually) > > nvkm/subdev/pwr/base.c | 2 +- > nvkm/subdev/pwr/priv.h | 1 + > 2 files changed, 2 insertions(+), 1 dele...

...), 1 deletion(-) diff --git a/nvkm/engine/graph/nve4.c b/nvkm/engine/graph/nve4.c index 1ba6666da4e5..fb9cb929320d 100644 --- a/nvkm/engine/graph/nve4.c +++ b/nvkm/engine/graph/nve4.c @@ -203,7 +203,8 @@ nve4_graph_init(struct nouveau_object *object) int gpc, tpc, rop; int ret, i; - ppwr->pgob(ppwr, false); + if (ppwr) + ppwr->pgob(ppwr, false); ret = nouveau_graph_init(&priv->base); if (ret) -- 2.0.1

..._mask(priv, 0x0010a16c, (0x1 << 31), 0x00000000); + } + + if (intr & 0x40) { + nv_debug(priv, "scheduling work\n"); + schedule_work(&priv->base.recv.work); + } + + nv_wr32(priv, 0x0010a004, intr); + nv_debug(priv, "irq handled\n"); +} + +static void +gk20a_pmu_pgob(struct nvkm_pmu *pmu, bool enable) +{ } static int gk20a_pmu_init(struct nvkm_object *object) { - struct nvkm_pmu *pmu = (void *)object; - struct gk20a_pmu_priv *priv = (void *)pmu; + struct gk20a_pmu_priv *priv = (void *)object; + struct nvkm_mc *pmc = nvkm_mc(object); int ret; - ret = n...

...; wrote: > > On 12/22/2014 05:11 PM, Vince Hsu wrote: >> >> The platform device does not use the common nouveau_pwr_init() to >> initialize >> the PWR, but it does need the .prob() be assigned to avoid NULL pointer >> dereference in graph/nve4.c. > > s/prob/pgob/ :-( > Will fix in next version. Is this the only change you need for a next version? If so, I can modify the commit message myself when I merge it. > >> >> Signed-off-by: Vince Hsu <vinceh at nvidia.com> >> --- >> >> v2: this patch is added since v2. (v...

...goto out; + } + if (intr & 0x40) { + nv_debug(ppmu, "scheduling work\n"); + schedule_work(&pmu->isr_workq); + goto out; + } + +out: + pmu_enable_irq(ppmu, pmc, true); + nv_wr32(ppmu, 0x0010a004, intr); + nv_debug(ppmu, "irq handled\n"); +} + +static void +gk20a_pmu_pgob(struct nvkm_pmu *ppmu, bool enable) +{ +} + +static int gk20a_pmu_init(struct nvkm_object *object) { - struct nvkm_pmu *pmu = (void *)object; - struct gk20a_pmu_priv *priv = (void *)pmu; + struct nvkm_pmu *ppmu = (void *)object; + struct nvkm_mc *pmc = nvkm_mc(object); + struct gk20a_pmu_priv *pm...

Both patches should make the communicating with the PMU more stable. Karol Herbst (2): pmu: fix queued messages while getting no IRQ pmu: be more strict about locking drm/nouveau/nvkm/subdev/pmu/base.c | 49 ++++++++++++++++++++++++++++++++------ 1 file changed, 42 insertions(+), 7 deletions(-) -- 2.7.2

...se; @@ -20,9 +33,20 @@ struct nvkm_pmu { u32 message; u32 data[2]; } recv; - + wait_queue_head_t init_wq; + bool gr_initialised; + struct dentry *debugfs; + struct pmu_buf_desc *pg_buf; + struct pmu_priv_vm *pmuvm; int (*message)(struct nvkm_pmu *, u32[2], u32, u32, u32, u32); void (*pgob)(struct nvkm_pmu *, bool); + int (*pmu_mutex_acquire)(struct nvkm_pmu *, u32 id, u32 *token); + int (*pmu_mutex_release)(struct nvkm_pmu *, u32 id, u32 *token); + int (*pmu_load_norm)(struct nvkm_pmu *pmu, u32 *load); + int (*pmu_load_update)(struct nvkm_pmu *pmu); + void (*pmu_reset_load_counters)...

Two trivial PMU-related fixes for Tegra: - Add a dummy func member to GK20A, since nvkm_pmmu_pgob() unconditionally dereferences it - Check whether a PMU actually exists before calling nvkm_pmmu_pgob(). During early bringup we are likely to not have a PMU Alexandre Courbot (2): pmu/gk20a: add dummy func gr/gf100: do not assume a PMU is present drm/nouveau/nvkm/engine/gr/gf100.c | 3...

...cheduling work\n"); >> + schedule_work(&priv->base.recv.work); >> + } >> + >> + nv_wr32(priv, 0x0010a004, intr); >> + nv_debug(priv, "irq handled\n"); >> +} >> + >> +static void >> +gk20a_pmu_pgob(struct nvkm_pmu *pmu, bool enable) >> +{ >> } >> >> static int >> gk20a_pmu_init(struct nvkm_object *object) >> { >> - struct nvkm_pmu *pmu = (void *)object; >> - struct gk20a_pmu_priv *priv = (void *)pmu; >> + struct g...

...v; > - > + wait_queue_head_t init_wq; > + bool gr_initialised; > + struct dentry *debugfs; > + struct pmu_buf_desc *pg_buf; > + struct pmu_priv_vm *pmuvm; > int (*message)(struct nvkm_pmu *, u32[2], u32, u32, u32, u32); > void (*pgob)(struct nvkm_pmu *, bool); > + int (*pmu_mutex_acquire)(struct nvkm_pmu *, u32 id, u32 *token); > + int (*pmu_mutex_release)(struct nvkm_pmu *, u32 id, u32 *token); > + int (*pmu_load_norm)(struct nvkm_pmu *pmu, u32 *load); > + int (*pmu_load_update)(struct nvkm_...

...* + * * NvPmUnnamed (boolean): Use the raw signal number rather than the name in + * perfmon queries; defaults to the value of NvPmShowAll. + * + * * NvPmEnableGating (boolean): Enable clockgating for chipsets that support + * it; defaults to false. + * + * * War00C800_0 (boolean): Enables the PGOB work-around on all GK10[467] + * boards; defaults to true. + * + * * MmuDebugBufferSize (integer): Size of the MUU debug buffers; defaults to + * the framebuffer page size. + * + * * NvAGP (integer): Force a particular AGP mode (0 to disable). + * + * * NvChipset (integer): Override the detecte...

There might be some callers of nouveau_clock_astate(), and they are from inetrrupt context. So we must ensure that this function can be atomic in that condition. This patch adds one parameter which is subsequently passed to nouveau_pstate_calc(). Therefore we can choose whether we want to wait for the pstate work's completion or not. Signed-off-by: Vince Hsu <vinceh at nvidia.com> ---

...v; > - > + wait_queue_head_t init_wq; > + bool gr_initialised; > + struct dentry *debugfs; > + struct pmu_buf_desc *pg_buf; > + struct pmu_priv_vm *pmuvm; > int (*message)(struct nvkm_pmu *, u32[2], u32, u32, u32, u32); > void (*pgob)(struct nvkm_pmu *, bool); > + int (*pmu_mutex_acquire)(struct nvkm_pmu *, u32 id, u32 *token); > + int (*pmu_mutex_release)(struct nvkm_pmu *, u32 id, u32 *token); > + int (*pmu_load_norm)(struct nvkm_pmu *pmu, u32 *load); > + int (*pmu_load_update)(struct nvkm_...

https://bugs.freedesktop.org/show_bug.cgi?id=91557 Bug ID: 91557 Summary: [NVE4] freezes: HUB_INIT timed out Product: xorg Version: unspecified Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW Severity: normal Priority: medium Component: Driver/nouveau Assignee: nouveau at

...* + * * NvPmUnnamed (boolean): Use the raw signal number rather than the name in + * perfmon queries; defaults to the value of NvPmShowAll. + * + * * NvPmEnableGating (boolean): Enable clockgating for chipsets that support + * it; defaults to false. + * + * * War00C800_0 (boolean): Enables the PGOB work-around on all GK10[467] + * boards; defaults to true. + * + * * MmuDebugBufferSize (integer): Size of the MUU debug buffers; defaults to + * the framebuffer page size. + * + * * NvAGP (integer): Force a particular AGP mode (0 to disable). + * + * * NvChipset (integer): Override the detecte...

https://bugs.freedesktop.org/show_bug.cgi?id=70354 Priority: medium Bug ID: 70354 Assignee: nouveau at lists.freedesktop.org Summary: Failed to initialise context object: 2D_NVC0 (0) (for my GeForce GT 750M) QA Contact: xorg-team at lists.x.org Severity: normal Classification: Unclassified OS: