Displaying 4 results from an estimated 4 matches for "pextrd".
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pextrq
2012 Sep 04
2
[LLVMdev] branch on vector compare?
...ory which I've never seen then again
> our code didn't try to extract the i1 directly (even without fixes for
> ptest the above sequence will result in only 2 extraction steps instead
> of 4 if you're on x64 and the cpu supports sse41 but I guess without
> sse41 and hence no pextrd/q it probably also will go through memory).
> Though on altivec this sequence might not produce anything good, the
> free sext requires llvm 2.7 on x86 to work at all (certainly shouldn't
> be a problem nowadays but on other backends it might be different) and
> for the ptest sequen...
2012 Sep 05
0
[LLVMdev] branch on vector compare?
...ve never seen then again
>> our code didn't try to extract the i1 directly (even without fixes for
>> ptest the above sequence will result in only 2 extraction steps instead
>> of 4 if you're on x64 and the cpu supports sse41 but I guess without
>> sse41 and hence no pextrd/q it probably also will go through memory).
>> Though on altivec this sequence might not produce anything good, the
>> free sext requires llvm 2.7 on x86 to work at all (certainly shouldn't
>> be a problem nowadays but on other backends it might be different) and
>> for...
2012 Sep 04
0
[LLVMdev] branch on vector compare?
...ments go through memory which I've never seen then again
our code didn't try to extract the i1 directly (even without fixes for
ptest the above sequence will result in only 2 extraction steps instead
of 4 if you're on x64 and the cpu supports sse41 but I guess without
sse41 and hence no pextrd/q it probably also will go through memory).
Though on altivec this sequence might not produce anything good, the
free sext requires llvm 2.7 on x86 to work at all (certainly shouldn't
be a problem nowadays but on other backends it might be different) and
for the ptest sequence very recent svn i...
2012 Sep 03
3
[LLVMdev] branch on vector compare?
> > which goes through memory. Is there some idiom I'm missing so that it would
use
> > for instance movmsk for SSE or vcmpgt & cr6 for altivec?
>
> I don't think you are missing anything: LLVM IR has no support for horizontal
> operations like or'ing the elements of a vector of boolean together. The code
> generators do try to recognize a few idioms and