search for: pex

...st/i686-pc-mingw32/include -isystem c:/cygwin/home/jlerouge/buildbot/llvm-test/i686-pc-mingw32/sys-include -c -DHAVE_CONFIG_H -O2 -g -O2 -I. -I../../../../llvm-gcc4.2-src/libiberty/../include -W -Wall -pedantic -Wwrite-strings -Wstrict-prototypes -Wc++-compat ../../../../llvm-gcc4.2-src/libiberty/pex-win32.c -o pex-win32.o ../../../../llvm-gcc4.2-src/libiberty/pex-win32.c: In function 'argv_to_cmdline': ../../../../llvm-gcc4.2-src/libiberty/pex-win32.c:365: warning: request for implicit conversion from 'void *' to 'char *' not permitted in C++ ../../../../llvm-gcc4.2-src...

I would also like to help as well. As KMacy knows before i asked a lot of questions for T2 types of servers but unfortunately i have no more access to those kind of hardware as well. I;m willing to participate if a team will be formated.

...n tsp<-function(n,e,a,c,lema){ x<-numeric(n) for (i in 1:n){ repeat{ w<-runif(1) v<-runif(1) x<-e*(w^(-1/a)) fex<-function(x1){ if (x1>=e) {a1<-a*(e^(-a))/(x^a-1)}} vex<-function(x2){c*exp(-lema*x2)/(x2^(a+1))} ue<-integrate(vex,e,Inf) aa<-(1/ue)*c pex<-function(x3){aa*exp(-lema*x3)/(x3^(a+1))} if (x>=e) {pex(x)} T<-fex(x)*(e^(-a))*(exp(-lema*e))/(pex(x)*a*ue) if(V*T<=1) break if (ue<=2) break } x } } tsp(10,0.01,1.5,1,10) Could any one help me? Thx~ -- View this message in context: http://r.789695.n4.nabble.com/...

...acl-bitcode-abi First, sorry for jumping in an old thread. I had this marked but had not been able to read it before. The document talks about ABI stability, but it is a bit unclear how far this goes. From older discussions, there are/were 3 interesting cases 1 Loading a stand alone application (pexe) in a new VM/browser. 2 Using a native library compiled with SDK N in an IR application compiled with SDK M. 3 Using a IR library compiled with SDK N in an IR application compiled with SDK M. The document discusses 1. Items 2 and 3 are probably harder, but not mentioned. Is there any support for...

Hi Mark, On 2013-08-02 04:11, Mark Seaborn wrote: > That note in the documentation seems to be incorrect, because LLVM > will do tail call optimisations on at least x86 when using the "ccc" > calling convention. For example: > > $ cat tail_call1.c > void foo(int arg); > void bar(int arg) { > foo(arg); > } > > $ clang tail_call1.c -S -o - -O2 >

.../32872: Error code, not defined (0), TFTP aborted This is with tftpd-hpa. I've tried with atftpd, and I get much the same conversation -- an error code immediately after an option ack. The hardware is a VIA-Rhine II (VT6102), claiming "Intel UNDI, PXE-2.0 (build 082)" when the PEX boot sequence starts. Is this a duff PXE implementation, or something stupid I've done? Thanks, Hugo. PS. This mailing list seems to have "issues" with PGP/MIME signed emails. Is that the case? -- === Hugo Mills: hugo at ... carfax.org.uk | darksatanic.net | lug.org.uk ===...

On 1 August 2013 00:11, Travis Cross <tc at travislists.com> wrote: > On 2013-07-30 22:11, Eli Bendersky wrote: > > we've published an initial version of the PNaCl bitcode reference > > manual online - > > http://www.chromium.org/nativeclient/pnacl/bitcode-abi. The PNaCl > > bitcode is a restricted subset of LLVM IR. > > > > Any comments would be

Hello, [The first paragraph is safe to skip if you already know what PNaCl is.] The Portable Native Client (PNaCl) project is a toolchain for producing portable bitcode from C and C++ code and running in securely and efficiently on the web via Native Client. For more details see this presentation from the last Google I/O: https://developers.google.com/events/io/sessions/325679543and

...lities: pci pciexpress msi pm normal_decode bus_master cap_list configuration: driver=pcieport resources: irq:16 ioport:3000(size=12288) memory:50600000-506fffff ioport:50400000(size=1048576) *-pci description: PCI bridge product: PEX 8505 5-lane, 5-port PCI Express Switch vendor: PLX Technology, Inc. physical id: 0 bus info: pci at 0000:01:00.0 version: aa width: 32 bits clock: 33MHz capabilities: pci pm msi pciexpres...

...PME# disabled [ 3.845310] pci 0000:07:06.0: bridge 32bit mmio: [0xfb800000-0xfb8fffff] [ 3.845322] pci 0000:07:06.0: bridge 64bit mmio pref: [0xd0000000-0xd00fffff] [ 3.845852] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0._PRT] [ 3.846016] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.PEX0._PRT] [ 3.846072] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.PEX4._PRT] [ 3.846118] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.PEX5._PRT] [ 3.846164] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.PEX6._PRT] [ 3.846209] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.PEX7._PRT] [...

Hi Rafael, Would you mind waiting for Derek to come back from vacation to discuss this? We do use this code and could improve how it's used and tested within LLVM. Derek is the best person to discuss this, he'll be back in mid-January. Thanks, JF On Fri, Dec 19, 2014 at 6:41 AM, Rafael Espíndola < rafael.espindola at gmail.com> wrote: > > > I CC'ed llvmdev to put a

Hello. In my case I can successfully boot up my Thinkpad X32, but the same configuration doesn't work for my desktop computer with Intel network card, with Intel Boot Agent 2.2 DHCP server is 10.0.0.1, tftpd (used tftp-hpa) runs on 10.0.0.32. netstat told me the daemon listen to 69 UDP port just fine. running tftp in commandline also shows it works (retrieve pxelinux.0 less then 1 second).

The PNaCl project has implemented various IR simplification passes that simplify LLVM IR by lowering complex features to simpler features. We'd like to upstream some of these IR passes to LLVM. We'd like to explore if this acceptable, and if so, how we should go about doing this. The immediate reason is that Emscripten is reusing PNaCl's IR passes for its new "fastcomp"

...bitstream reader. That said, we still use the upstream bitcode reader / bitstream reader in the browser w/ PNaCl. This is used for debugging non-guaranteed-to-be-stable temporary copies of apps in the browser ( https://developer.chrome.com/native-client/devguide/devcycle/debugging#debugging-pnacl-pexes-pepper-35-or-later ). That said, the overlapped compile/download is probably not a big deal for the debugging use case. *) It looks like gzip encoded files will have content-length set to the size of the *gzipped* body, not the size of the original bitcode: http://stackoverflow.com/questions/381...

Hi, I''m trying to get VGA passthrough to work to an XP x64 guest, and I''m seeing "interesting" things happening. I''m using the kernel and userspace tools from here: http://xen.crc.id.au/support/guides/install/# on Scientific Linux 6. I gave up on trying to get an Nvidia card to work in the guest having read about the extra patches required to get a

...cfq registered (default) [ 8.922666] io scheduler mq-deadline registered [ 8.922669] io scheduler kyber registered [ 8.922748] io scheduler bfq registered [ 8.926709] tegra-pcie 10003000.pcie: 4x1, 1x1 configuration [ 8.926736] tegra-pcie 10003000.pcie: Failed to get supply 'dvdd-pex': -517 [ 8.927206] ipmi message handler version 39.2 [ 8.930002] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled [ 8.931212] console [ttyS0] disabled [ 8.931241] 3100000.serial: ttyS0 at MMIO 0x3100000 (irq = 22, base_baud = 25500000) is a Tegra [ 9.801591] console [ttyS0...

Thanks to Thierry for finding this - applying index e14643615698..00eeaaffeae5 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c @@ -2369,7 +2369,7 @@ nv13b_chipset = { .imem = gk20a_instmem_new, .ltc = gp100_ltc_new, .mc = gp10b_mc_new, - .mmu = gf100_mmu_new, + .mmu = gp10b_mmu_new,

...cfq registered (default) [ 8.634528] io scheduler mq-deadline registered [ 8.634532] io scheduler kyber registered [ 8.634614] io scheduler bfq registered [ 8.638596] tegra-pcie 10003000.pcie: 4x1, 1x1 configuration [ 8.638622] tegra-pcie 10003000.pcie: Failed to get supply 'dvdd-pex': -517 [ 8.639104] ipmi message handler version 39.2 [ 8.641894] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled [ 8.643058] console [ttyS0] disabled [ 8.643086] 3100000.serial: ttyS0 at MMIO 0x3100000 (irq = 22, base_baud = 25500000) is a Tegra [ 9.513489] console [ttyS0...

...cfq registered (default) [ 8.617718] io scheduler mq-deadline registered [ 8.617722] io scheduler kyber registered [ 8.617805] io scheduler bfq registered [ 8.621804] tegra-pcie 10003000.pcie: 4x1, 1x1 configuration [ 8.621829] tegra-pcie 10003000.pcie: Failed to get supply 'dvdd-pex': -517 [ 8.622295] ipmi message handler version 39.2 [ 8.625086] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled [ 8.626267] console [ttyS0] disabled [ 8.626294] 3100000.serial: ttyS0 at MMIO 0x3100000 (irq = 22, base_baud = 25500000) is a Tegra [ 9.496670] console [ttyS0...