search for: petrog

...s feasible. I think we can make further progress on trivial cases (where FE doesn't "change" type) while we continue working out the details on non-trivial cases. Thanks, Hideki From: Doerfert, Johannes [mailto:jdoerfert at anl.gov] Sent: Monday, June 24, 2019 9:21 AM To: Francesco Petrogalli <Francesco.Petrogalli at arm.com>; Tian, Xinmin <xinmin.tian at intel.com> Cc: Saito, Hideki <hideki.saito at intel.com>; Simon Moll <moll at cs.uni-saarland.de>; LLVM Development List <llvm-dev at lists.llvm.org>; Clang Dev <cfe-dev at lists.llvm.org>; Renat...

On 12 December 2016 at 16:49, Francesco Petrogalli <Francesco.Petrogalli at arm.com> wrote: > I am not sure I understand here. In my patch, all I am doing is “vector > symbol awareness generation”. There are no globals that are generated in > the final object file, it is just the TargetLibraryInfoImpl that is being > populated...

> On Jun 24, 2019, at 10:53 AM, Tian, Xinmin <xinmin.tian at intel.com> wrote: > > To me, it is also an issue related to SIMD signature matching when the vectorizer kicks in. Losing info from FE to BE is not good in general. > Yes, we cannot loose such information. In particular, the three examples I reported are all generating i64 in the scalar function signature: // Type 1

...be that kind of processing that is specific to the vectorizer and not the lowering ABI part. Note, that I don't insist on this approach, it's just an alternative to the "hardcoded" usage of OMP's Vector Function ABI. Thanks, Andrei -----Original Message----- From: Francesco Petrogalli <Francesco.Petrogalli at arm.com> Sent: Monday, June 10, 2019 11:38 To: Elovikov, Andrei <andrei.elovikov at intel.com> Cc: llvm-dev at lists.llvm.org; Saito, Hideki <hideki.saito at intel.com> Subject: Re: [RFC] Expose user provided vector function for auto-vectorization....

Hi, is there a R function that order a matrix according to some criteria based on the rows(or cols) of that matrix? For example, let's say that my matrix S is composed by n rows S_1, S_2,.., S_n and that I compute some real value g_i=g(S_i) for each row. Then I want to order this set of g_i (from smaller to bigger) and order the correspondent row to the new position. Is it possible (apart

...e (we need that info in the FE anyway). That way the vectorizer pass won't need to care about the tricky processing and we (possibly) will get a somewhat easier to understand IR after the vectorizer. Is that something that might work? Thanks, Andrei -----Original Message----- From: Francesco Petrogalli <Francesco.Petrogalli at arm.com> Sent: Monday, June 10, 2019 09:09 To: Elovikov, Andrei <andrei.elovikov at intel.com> Cc: llvm-dev at lists.llvm.org; Saito, Hideki <hideki.saito at intel.com> Subject: Re: [RFC] Expose user provided vector function for auto-vectorization. H...

On Fri, 31 May 2019 at 17:19, Francesco Petrogalli via llvm-dev <llvm-dev at lists.llvm.org> wrote: > TOPIC 2: metadata vs attribute > > Also, @Renato expressed concern that metadata might be dropped by optimization passes - would using attributes prevent that? I think it would, thanks! > TOPIC 3: "there are no special...

Hello, I am trying to access https://git.llvm.org/git/llvm to be able to cherry pick some of the recent commits I did in the monorepo into our downstream llvm-only repository. The host seems defunct, is this part of the move to the monorepo? I think I can just get the patch and remove the `llvm` on top of the paths, but that’s not a scalable approach. Francesco

...e OpenMP code generation (in the future). That could allow easier reuse by other frontends. Get Outlook for Android<https://aka.ms/ghei36> ________________________________ From: Tian, Xinmin <xinmin.tian at intel.com> Sent: Monday, June 24, 2019 5:28:45 PM To: Saito, Hideki; Francesco Petrogalli; Doerfert, Johannes Cc: Simon Moll; LLVM Development List; Clang Dev; Renato Golin; Finkel, Hal J.; Andrea Bocci; Elovikov, Andrei; Alexey Bataev; nd; Roman Lebedev; Philip Reames; Shawn Landden Subject: RE: RFC: Interface user provided vector functions with the vectorizer. >>>>I d...

>Thank you everybody for their input, and for your patience. This is proving harder than expected! :) Thank you for doing the hard part of the work. Hideki -----Original Message----- From: Francesco Petrogalli [mailto:Francesco.Petrogalli at arm.com] Sent: Monday, June 24, 2019 11:26 AM To: Saito, Hideki <hideki.saito at intel.com> Cc: Doerfert, Johannes <jdoerfert at anl.gov>; Tian, Xinmin <xinmin.tian at intel.com>; Simon Moll <moll at cs.uni-saarland.de>; LLVM Development...

...ption of 'patch' is exactly for doing this. Would that simplify your use-case? > Yes, for a single patch that would work. If there is a way to do that also when `git cherry-picking` from monorepo to llvm-only it would be great. Francesco >> On 14. Nov 2019, at 22:12, Francesco Petrogalli via llvm-dev <llvm-dev at lists.llvm.org> wrote: >> >> Hello, >> >> I am trying to access https://git.llvm.org/git/llvm to be able to cherry pick some of the recent commits I did in the monorepo into our downstream llvm-only repository. >> >> The hos...

...s is very similar, but only expressed in terms of clang attributes, which may have different spellings for clang, GCC, c++11 etc. I don't think GCC will implement this as pragma. They added simd attribute instead of pragma. Best regards, Alexey Bataev > 31 мая 2019 г., в 14:43, Francesco Petrogalli <Francesco.Petrogalli at arm.com> написал(а): > > > >> On May 31, 2019, at 1:04 PM, Alexey Bataev <a.bataev at hotmail.com> wrote: >> >> You can define clang specific attribute and later add GCC alias for it. >> > > This sounds very much...

...you look into how GCC VectorABI can be >extended support your Arch. > >Thanks, >Xinmin > >-----Original Message----- >From: Odeh, Saher >Sent: Thursday, December 8, 2016 3:49 AM >To: Tian, Xinmin <xinmin.tian at intel.com>; llvm-dev at lists.llvm.org; >Francesco.Petrogalli at arm.com >Cc: nd <nd at arm.com>; Masten, Matt <matt.masten at intel.com>; Hal Finkel ><hfinkel at anl.gov>; Zaks, Ayal <ayal.zaks at intel.com>; a.bataev at hotmail.com >Subject: RE: [llvm-dev] [RFC] Enable "#pragma omp declare simd" in the >Loop...

...t I fully agree that this needs to be done properly according to the ABI. >Therefore, I would like to propose a change to the RFC, which would move the responsibility off generating the vector function signature from LLVM to clang. Makes sense to me. -----Original Message----- From: Francesco Petrogalli [mailto:Francesco.Petrogalli at arm.com] Sent: Friday, June 21, 2019 2:04 PM To: Doerfert, Johannes <jdoerfert at anl.gov> Cc: Simon Moll <moll at cs.uni-saarland.de>; LLVM Development List <llvm-dev at lists.llvm.org>; Clang Dev <cfe-dev at lists.llvm.org>; Renato Goli...

You can define clang specific attribute and later add GCC alias for it. Best regards, Alexey Bataev > 31 мая 2019 г., в 13:46, Francesco Petrogalli <Francesco.Petrogalli at arm.com> написал(а): > > > >> On May 31, 2019, at 12:38 PM, Alexey Bataev <a.bataev at hotmail.com> wrote: >> >> Francesco, there won't be any duplication. Most of the declarative OpenMP directives are represented as attrib...

Thursday 11 April Meet you at 6:00pm at Pour House (west of 183). Pour House 11835 Jollyville Rd, Austin, TX 78759 http://pourhousepintsandpies.com/ -- -Brian -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20190407/030ce223/attachment.html>

)On 12 December 2016 at 13:44, Francesco Petrogalli <Francesco.Petrogalli at arm.com> wrote: > I am using “D” for 64-bit NEON and “Q” for 128-bit NEON, which makes NEON > vector symbols look as follows: > > _ZVGQN2v__Z1fd > _ZVGDN2v__Z1ff > _ZVGQN4v__Z1ff Hi Francesco, The ARM AAPCS (A.2.1) says: "For C++ the mang...

On 12/12/2016 14:32, "Renato Golin" <renato.golin at linaro.org> wrote: >Clang is already able to mangle NEON vectors of any length >(CXXNameMangler::mangleNeonVectorType), you should use that, as this >is very likely to be compatible with other compilers as well. Hi Renato, The “u”, “v”, “l” mangling of parameters has already been agreed internally at ARM with the gcc

Hello everybody, is there a way to tell Sweave to skip the R code and process only the LaTeX part? I know it sounds a little bit weird, but the R code of my document is complete and _slow_ and I need to add the LaTeX part. Thanks, franZ

Count me in. Some of my colleagues will join as well. Sebastian On Wed, Apr 3, 2019 at 8:44 AM Francesco Petrogalli via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Nice idea Brian, I am based in Austin and I would like to socialize with other LLVM engineers in the area. > > Constrains: I might not be in town for the week of Apr 29 - May 3rd :) > > Francesco > > > On Apr...