Displaying 2 results from an estimated 2 matches for "performshiftcombine".
2010 Nov 12
0
[LLVMdev] Simple NEON optimization
...ssible vector immediates for the "one register plus a modified immediate" format.  In this case it doesn't matter because the canonical encoding of a zero vector is just zero.  When you find that case, use DAG.getNode() to return a new node for the compare against zero operation.  The PerformShiftCombine function is a fairly simple example of what needs to be done (although it's doing a completely different combination).
3. Write a testcase and make sure it works.
Thanks for offering to work on this!
2010 Nov 12
2
[LLVMdev] Simple NEON optimization
Hi folks, me again,
So, I want to implement a simple optimization in a NEON case I've seen
these days, most as a matter of exercise, but it also simplifies (just
a bit) the code generated.
The case is simple:
        uint32x2_t x, res;
        res = vceq_u32(x, vcreate_u32(0));
This will generate the following code:
        ; zero d16
        vmov.i32        d16, #0x0
        ; load a