Displaying 3 results from an estimated 3 matches for "peoi".
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pei
2013 May 31
62
cpuidle and un-eoid interrupts at the local apic
Recently our automated testing system has caught a curious assertion
while testing Xen 4.1.5 on a HaswellDT system.
(XEN) Assertion ''(sp == 0) || (peoi[sp-1].vector < vector)'' failed at irq.c:1030
(XEN) ----[ Xen-4.1.5 x86_64 debug=n Not tainted ]----
(XEN) CPU: 0
(XEN) RIP: e008:[<ffff82c48016b2b4>] do_IRQ+0x514/0x750
(XEN) RFLAGS: 0000000000010093 CONTEXT: hypervisor
(XEN) rax: 000000000000002f rbx: ffff830249841e8...
2007 Dec 27
2
VT-d and the GPU
...ffbce000 virt_to_maddr(hd->pgd) = bce000
(XEN) root_entry = ffbcb000
(XEN) root_entry[0] = bc5001
(XEN) maddr_to_virt(root_entry[0]) = ffbc5001
(XEN) ctxt_entry[10].lo == 0
(XEN) io.c:157:d0 hvm_dpci_eoi:: device 2 intx 0
(XEN) Assertion ''(sp == 0) || (peoi[sp-1].vector < vector)'' failed
at irq.c:226
(XEN) ----[ Xen-3.2-unstable x86_32p debug=y Not tainted ]----
(XEN) CPU: 0
(XEN) EIP: e008:[<ff12ab6b>] do_IRQ+0xe8/0x299
(XEN) EFLAGS: 00010002 CONTEXT: hypervisor
(XEN) eax: 00000001 ebx: 00000001 ecx:...
2012 Oct 02
18
[PATCH 0/3] x86: adjust entry frame generation
This set of patches converts the way frames gets created from
using PUSHes/POPs to using MOVes, thus allowing (in certain
cases) to avoid saving/restoring part of the register set.
While the place where the (small) win from this comes from varies
between CPUs, the net effect is a 1 to 2% reduction on a
combined interruption entry and exit when the full state save
can be avoided.
1: use MOV