Displaying 8 results from an estimated 8 matches for "pending_ev".
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pending_key
2013 Jan 23
1
[PATCH V2] libxc, libxenstore: make the headers C++-friendlier
...pat *old=h;
+ struct hvm_hw_cpu *newcpu = (struct hvm_hw_cpu *)h;
+ struct hvm_hw_cpu_compat *old = (struct hvm_hw_cpu_compat *)h;
/* If we copy from the end backwards, we should
* be able to do the modification in-place */
- new->error_code=old->error_code;
- new->pending_event=old->pending_event;
- new->tsc=old->tsc;
- new->msr_tsc_aux=0;
+ newcpu->error_code = old->error_code;
+ newcpu->pending_event = old->pending_event;
+ newcpu->tsc = old->tsc;
+ newcpu->msr_tsc_aux = 0;
return 0;
}
2013 Jan 23
1
[PATCH V3] libxc, libxenstore: make the headers C++-friendlier
...{
- struct hvm_hw_cpu *new=h;
- struct hvm_hw_cpu_compat *old=h;
+ union hvm_hw_cpu_union *ucpu = (union hvm_hw_cpu_union *)h;
- /* If we copy from the end backwards, we should
- * be able to do the modification in-place */
- new->error_code=old->error_code;
- new->pending_event=old->pending_event;
- new->tsc=old->tsc;
- new->msr_tsc_aux=0;
+ ucpu->nat.error_code = ucpu->cmp.error_code;
+ ucpu->nat.pending_event = ucpu->cmp.pending_event;
+ ucpu->nat.tsc = ucpu->cmp.tsc;
+ ucpu->nat.msr_tsc_aux = 0;
return 0;
}
2007 Jun 05
13
about VIRQ & PIRQ
about VIRQ & PIRQ
what is VIRQ ?How VIRQ is different from PIRQ ?How VIRQ & PIRQ are related each other ?
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2015 Oct 09
0
[PATCH 1/2] kvm/x86: Hyper-V synthetic interrupt controller
...m/lapic.h b/arch/x86/kvm/lapic.h
index fde8e35d..6c64090 100644
--- a/arch/x86/kvm/lapic.h
+++ b/arch/x86/kvm/lapic.h
@@ -164,6 +164,11 @@ static inline int kvm_lapic_latched_init(struct kvm_vcpu *vcpu)
return kvm_vcpu_has_lapic(vcpu) && test_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
}
+static inline int kvm_apic_id(struct kvm_lapic *apic)
+{
+ return (kvm_apic_get_reg(apic, APIC_ID) >> 24) & 0xff;
+}
+
bool kvm_apic_pending_eoi(struct kvm_vcpu *vcpu, int vector);
void wait_lapic_expire(struct kvm_vcpu *vcpu);
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kv...
2015 Oct 09
5
[PATCH 0/2] Hyper-V synthetic interrupt controller
This patchset implements the KVM part of the synthetic interrupt
controller (synic) which is a building block of the Hyper-V
paravirtualized device bus (vmbus).
Synic is a lapic extension, which is controlled via MSRs and maintains
for each vCPU
- 16 synthetic interrupt "lines" (SINT's); each can be configured to
trigger a specific interrupt vector optionally with auto-EOI
2015 Oct 09
5
[PATCH 0/2] Hyper-V synthetic interrupt controller
This patchset implements the KVM part of the synthetic interrupt
controller (synic) which is a building block of the Hyper-V
paravirtualized device bus (vmbus).
Synic is a lapic extension, which is controlled via MSRs and maintains
for each vCPU
- 16 synthetic interrupt "lines" (SINT's); each can be configured to
trigger a specific interrupt vector optionally with auto-EOI
2015 Oct 16
10
[PATCH v2 0/9] Hyper-V synthetic interrupt controller
This patchset implements the KVM part of the synthetic interrupt
controller (SynIC) which is a building block of the Hyper-V
paravirtualized device bus (vmbus).
SynIC is a lapic extension, which is controlled via MSRs and maintains
for each vCPU
- 16 synthetic interrupt "lines" (SINT's); each can be configured to
trigger a specific interrupt vector optionally with auto-EOI
2015 Oct 16
10
[PATCH v2 0/9] Hyper-V synthetic interrupt controller
This patchset implements the KVM part of the synthetic interrupt
controller (SynIC) which is a building block of the Hyper-V
paravirtualized device bus (vmbus).
SynIC is a lapic extension, which is controlled via MSRs and maintains
for each vCPU
- 16 synthetic interrupt "lines" (SINT's); each can be configured to
trigger a specific interrupt vector optionally with auto-EOI