search for: pdevic

Displaying 20 results from an estimated 25 matches for "pdevic".

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2018 Nov 23
2
[PATCH] drm/nouveau: tegra: Call nouveau_drm_device_init()
...-1171,10 +1171,16 @@ nouveau_platform_device_create(const struct nvkm_device_tegra_func *func, goto err_free; } + err = nouveau_drm_device_init(drm); + if (err) + goto err_put; + platform_set_drvdata(pdev, drm); return drm; +err_put: + drm_dev_put(drm); err_free: nvkm_device_del(pdevice); -- 2.19.1
2020 Nov 06
2
[PATCH 2/3] drm/nouveau: manage nouveau_drm lifetime with devres
...drm_dev_put(dev); > nvkm_device_del(&device); > } > > @@ -1285,7 +1279,8 @@ nouveau_platform_device_create(const struct nvkm_device_tegra_func *func, > struct platform_device *pdev, > struct nvkm_device **pdevice) > { > - struct drm_device *drm; > + struct nouveau_drm *nv_dev; > + struct drm_device *drm_dev; > int err; > > err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug, > @@ -1293,22 +1288,21 @@ nouveau_platform_device_create...
2020 Oct 13
3
[PATCH] drm/nouveau/device: fix changing endianess code to work on older GPUs
...ouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c index dcb70677d0acc..7851bec5f0e5f 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c @@ -2924,17 +2924,34 @@ nvkm_device_del(struct nvkm_device **pdevice) } } +/* returns true if the GPU is in the CPU native byte order */ static inline bool nvkm_device_endianness(struct nvkm_device *device) { - u32 boot1 = nvkm_rd32(device, 0x000004) & 0x01000001; #ifdef __BIG_ENDIAN - if (!boot1) - return false; + const bool big_endian = true; #else...
2013 Feb 15
1
xen/acpi: ACPI memory hotplug
...end; 173 174 status = acpi_get_parent(handle, &phandle); 175 if (ACPI_FAILURE(status)) { 176 pr_warn(PREFIX "Cannot find acpi parent\n"); 177 return -EINVAL; 178 } 179 180 /* Get the parent device */ 181 result = acpi_bus_get_device(phandle, &pdevice); 182 if (result) { 183 pr_warn(PREFIX "Cannot get acpi bus device\n"); 184 return -EINVAL; 185 } 186 187 /* 188 * Now add the notified device. This creates the acpi_device 189 * and invokes .add function 190 */ 191 result = acpi_bus_scan(han...
2013 Feb 15
1
xen/acpi: ACPI memory hotplug
...end; 173 174 status = acpi_get_parent(handle, &phandle); 175 if (ACPI_FAILURE(status)) { 176 pr_warn(PREFIX "Cannot find acpi parent\n"); 177 return -EINVAL; 178 } 179 180 /* Get the parent device */ 181 result = acpi_bus_get_device(phandle, &pdevice); 182 if (result) { 183 pr_warn(PREFIX "Cannot get acpi bus device\n"); 184 return -EINVAL; 185 } 186 187 /* 188 * Now add the notified device. This creates the acpi_device 189 * and invokes .add function 190 */ 191 result = acpi_bus_scan(han...
2020 Nov 06
0
[PATCH 2/3] drm/nouveau: manage nouveau_drm lifetime with devres
...= nvkm_device_find(client->device); nouveau_drm_device_fini(dev); - drm_dev_put(dev); nvkm_device_del(&device); } @@ -1285,7 +1279,8 @@ nouveau_platform_device_create(const struct nvkm_device_tegra_func *func, struct platform_device *pdev, struct nvkm_device **pdevice) { - struct drm_device *drm; + struct nouveau_drm *nv_dev; + struct drm_device *drm_dev; int err; err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug, @@ -1293,22 +1288,21 @@ nouveau_platform_device_create(const struct nvkm_device_tegra_func *func, if (err) goto err_f...
2001 Aug 12
1
R (D)COM automation server for windows, type mismatch?
...atConnectorSrv.exe ISGFX: ... IStatConnectorCharacterDevice: Clear() WriteString(bstrLine As String) WriteStringLevel(bstrLine As String, lLevel As Long) IStatConnectorUIAgent: ... StatConnector: Init(bstrConnectorName As String) * AddGraphicsDevice(bstrName As String, pDevice As ISGFX) * SetCharacterOutputDevice(pCharDevice As IStatConnectorCharacterDevice) ... Close() -- Aufgepasst - jetzt viele 1&1 New WebHosting Pakete ohne Einrichtungsgebuehr + 1 Monat Grundgebuehrbefreiung! http://puretec.de/index.html?ac=OM.PU.PU003K00736T0492a -.-.-.-.-.-.-...
2016 Dec 06
0
[PATCH 3/8] core: add falcon library functions
...c)/nvkm/engine/Kbuild diff --git a/drm/nouveau/nvkm/engine/device/base.c b/drm/nouveau/nvkm/engine/device/base.c index 2cbcffe78c3e..683ffcf0eaa4 100644 --- a/drm/nouveau/nvkm/engine/device/base.c +++ b/drm/nouveau/nvkm/engine/device/base.c @@ -2496,6 +2496,9 @@ nvkm_device_del(struct nvkm_device **pdevice) if (device->func->dtor) *pdevice = device->func->dtor(device); + + nvkm_falcon_cleanup(device); + mutex_unlock(&nv_devices_mutex); kfree(*pdevice); @@ -2715,6 +2718,8 @@ nvkm_device_ctor(const struct nvkm_device_func *func, } mutex_init(&device->mute...
2020 Apr 28
0
[PATCH v3 2/3] device: detect if changing endianness failed
...rtions(+), 5 deletions(-) diff --git a/drm/nouveau/nvkm/engine/device/base.c b/drm/nouveau/nvkm/engine/device/base.c index 37589f365..c732074bf 100644 --- a/drm/nouveau/nvkm/engine/device/base.c +++ b/drm/nouveau/nvkm/engine/device/base.c @@ -2924,6 +2924,20 @@ nvkm_device_del(struct nvkm_device **pdevice) } } +static inline bool +nvkm_device_endianness(void __iomem *pri) +{ + u32 boot1 = ioread32_native(pri + 0x000004) & 0x01000001; +#ifdef __BIG_ENDIAN + if (!boot1) + return false; +#else + if (boot1) + return false; +#endif + return true; +} + int nvkm_device_ctor(const struct nvkm_...
2020 Oct 13
0
[PATCH] drm/nouveau/device: fix changing endianess code to work on older GPUs
...evice/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c > index dcb70677d0acc..7851bec5f0e5f 100644 > --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c > +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c > @@ -2924,17 +2924,34 @@ nvkm_device_del(struct nvkm_device **pdevice) > } > } > > +/* returns true if the GPU is in the CPU native byte order */ > static inline bool > nvkm_device_endianness(struct nvkm_device *device) > { > - u32 boot1 = nvkm_rd32(device, 0x000004) & 0x01000001; > #ifdef __BIG_ENDIAN > - i...
2016 Jan 26
2
[PATCH] device/tegra: fix uninitialized IRQ number
Am Montag, den 25.01.2016, 18:44 +0900 schrieb Alexandre Courbot: > nvkm_device_tegra_new initializes the irq member of the Tegra device > to -1 in order to signal that it is uninitialized. However, > nvkm_device_tegra_fini tests it against 0 to check whether an IRQ has > been allocated or not. This leads to free_irq being called on -1 > during > device initialization. > The
2020 Apr 17
2
[PATCH 1/3] device: use the correct mmio size when mapping
Fixes warnings on GPUs with smaller a smaller mmio region like vGPUs. Signed-off-by: Karol Herbst <kherbst at redhat.com> --- drm/nouveau/nvkm/engine/device/base.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drm/nouveau/nvkm/engine/device/base.c b/drm/nouveau/nvkm/engine/device/base.c index 8ebbe1656..17676c75a 100644 --- a/drm/nouveau/nvkm/engine/device/base.c +++
2020 Apr 17
2
[PATCH v2 1/3] device: use the correct mmio size when mapping
Fixes warnings on GPUs with smaller a smaller mmio region like vGPUs. Signed-off-by: Karol Herbst <kherbst at redhat.com> --- drm/nouveau/nvkm/engine/device/base.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drm/nouveau/nvkm/engine/device/base.c b/drm/nouveau/nvkm/engine/device/base.c index 8ebbe1656..17676c75a 100644 --- a/drm/nouveau/nvkm/engine/device/base.c +++
2020 Nov 06
4
[PATCH 0/3] drm/nouveau: extend the lifetime of nouveau_drm
Hi folks, Currently, when the device is removed (or the driver is unbound) the nouveau_drm structure de-allocated. However, it's still accessible from and used by some DRM layer callbacks. For example, file handles can be closed after the device has been removed (physically or otherwise). This series converts the Nouveau device structure to be allocated and de-allocated with the
2020 Apr 28
3
[PATCH v3 1/3] device: rework mmio mapping code to get rid of second map
Fixes warnings on GPUs with smaller a smaller mmio region like vGPUs. Signed-off-by: Karol Herbst <kherbst at redhat.com> --- drm/nouveau/nvkm/engine/device/base.c | 27 +++++++++++++++------------ 1 file changed, 15 insertions(+), 12 deletions(-) diff --git a/drm/nouveau/nvkm/engine/device/base.c b/drm/nouveau/nvkm/engine/device/base.c index 8ebbe1656..37589f365 100644 ---
2015 Sep 04
4
[PATCH 0/4] tegra: DMA mask and IOMMU bit fixes
These 4 patches fix two issues that existed on Tegra regarding DMA: 1) The bit indicating whether to use an IOMMU or not was hardcoded ; make this a platform property and use it in instmem 2) The DMA mask was not set for platform devices. Fix this by converting more pci_dma* to the DMA API, and use that more generic code to set the DMA mask properly for all platforms. Tested on both x86
2019 Sep 11
6
[PATCH 0/4] HMM tests and minor fixes
These changes are based on Jason's latest hmm branch. Patch 1 was previously posted here [1] but was dropped from the orginal series. Hopefully, the tests will reduce concerns about edge conditions. I'm sure more tests could be usefully added but I thought this was a good starting point. [1] https://lore.kernel.org/linux-mm/20190726005650.2566-6-rcampbell at nvidia.com/ Ralph Campbell
2016 Dec 06
9
[PATCH 0/8] Falcon library
This was the first step of the secure boot refactoring - as Ben asked for some fixes, I now submit it as its own series to make it easier to review (and also because rebasing secure boot on top of this takes time and I don't want to do it until this is validated!). This series attempts to factorize the duplicate falcon-related code into a single library, using the existing nvkm_falcon
2016 Oct 06
6
[PATCH v5 0/3] drm/nouveau: set DMA mask before mapping scratch page
This v4 is now a 3 piece series (since v4), after Alexandre pointed out that both GF 100 and NV50 are affected by the same issue, and that a related issue has been solved already for Tegra in commit 9d0394c6bed5 ("drm/nouveau/instmem/gk20a: set DMA mask early"). The issue that this series addresses is the fact that the Nouveau driver invokes the DMA API before setting the DMA mask. In
2019 Nov 02
13
[PATCH v2 0/9] drm/nouveau: Various fixes for GP10B
From: Thierry Reding <treding at nvidia.com> Hi Ben, here's a revised subset of the patches I had sent out a couple of weeks ago. I've reworked the BAR2 accesses in the way that you had suggested, which at least for GP10B turned out to be fairly trivial to do. I have not looked in detail at this for GV11B yet, but a cursory look showed that BAR2 is accessed in more places, so the