Displaying 20 results from an estimated 23 matches for "pdesc".
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2016 Nov 02
0
[PATCH v3 06/15] secboot: add low-secure firmware hooks
...c const lsf_load_func lsf_load_funcs[] = {
*
*/
static void
-ls_ucode_img_populate_bl_desc(struct ls_ucode_img *img, u64 wpr_addr,
- struct gm200_flcn_bl_desc *desc)
+gm200_secboot_ls_bl_desc(const struct ls_ucode_img *img, u64 wpr_addr,
+ void *_desc)
{
- struct ls_ucode_img_desc *pdesc = &img->ucode_desc;
+ struct gm200_flcn_bl_desc *desc = _desc;
+ const struct ls_ucode_img_desc *pdesc = &img->ucode_desc;
u64 addr_base;
addr_base = wpr_addr + img->lsb_header.ucode_off +
@@ -620,6 +446,8 @@ ls_ucode_img_fill_headers(struct gm200_secboot *gsb, struct ls_ucod...
2018 Feb 04
0
[PATCH 2/3] Add generic facility to override HID report descriptor in usbhid-ups
..._SET);
+
+ buf = xmalloc(size);
+
+ if (fread(buf, size, 1, f) != 1) {
+ upslog_with_errno(LOG_CRIT, "Short read of %s", descfile);
+ fclose(f);
+ free(buf);
+ return 0;
+ }
+ fclose(f);
+
+ rdbuf = buf;
+ rdlen = size;
+ }
+
/* Parse Report Descriptor */
Free_ReportDesc(pDesc);
pDesc = Parse_ReportDesc(rdbuf, rdlen);
+
+ if (descfile)
+ free(rdbuf);
+
if (!pDesc) {
upsdebug_with_errno(1, "Failed to parse report descriptor!");
return 0;
--
2.7.4
--
Russell King
2016 Dec 14
18
[PATCH v5 0/18] Secure Boot refactoring
Sending things in a smaller chunks since it makes their reviewing
easier.
This part part 2/3 of the secboot refactoring/PMU command support
patch series. Part 1 was the new falcon library which should be
merged soon now.
This series is mainly a refactoring/sanitization of the existing
secure boot code. It does not add new features (part 3 will).
Secure boot handling is now separated by NVIDIA
2016 Aug 26
0
[PATCH v8 05/18] dmaengine: st_fdma: Add STMicroelectronics FDMA engine driver support
...ed long nbytes, ch_cmd, cmd;
+
+ vdesc = vchan_next_desc(&fchan->vchan);
+ if (!vdesc)
+ return;
+
+ fchan->fdesc = to_st_fdma_desc(vdesc);
+ nbytes = fchan->fdesc->node[0].desc->nbytes;
+ cmd = FDMA_CMD_START(fchan->vchan.chan.chan_id);
+ ch_cmd = fchan->fdesc->node[0].pdesc | FDMA_CH_CMD_STA_START;
+
+ /* start the channel for the descriptor */
+ fnode_write(fchan, nbytes, FDMA_CNTN_OFST);
+ fchan_write(fchan, ch_cmd, FDMA_CH_CMD_OFST);
+ writel(cmd,
+ fchan->fdev->slim_rproc->peri + FDMA_CMD_SET_OFST);
+
+ dev_dbg(fchan->fdev->dev, "start chan:%d...
2016 Nov 02
15
[PATCH v3 00/15] Secure Boot refactoring
This is a rework of the secure boot code that moves the building of the blob
into its own set of source files (and own hooks), making the code more flexible
and (hopefully) easier to understand as well.
This rework is needed to support more signed firmware for existing and new
chips. Since the firmwares in question are not available yet I cannot send the
code to manage then, but hopefully the
2016 Nov 02
0
[PATCH v3 14/15] secboot: abstract LS firmware loading functions
...uct nvkm_acr *acr,
- const struct ls_ucode_img *img, u64 wpr_addr,
+ const struct ls_ucode_img *_img, u64 wpr_addr,
void *_desc)
{
+ struct ls_ucode_img_r352 *img = ls_ucode_img_r352(_img);
struct acr_r352_flcn_bl_desc *desc = _desc;
- const struct ls_ucode_img_desc *pdesc = &img->ucode_desc;
+ const struct ls_ucode_img_desc *pdesc = &_img->ucode_desc;
u64 base, addr_code, addr_data;
base = wpr_addr + img->lsb_header.ucode_off + pdesc->app_start_offset;
@@ -162,29 +162,46 @@ struct hsflcn_acr_desc {
* Low-secure blob creation
*/
-typed...
2016 Nov 21
33
[PATCH v4 0/33] Secure Boot refactoring / signed PMU firmware support for GM20B
This revision includes initial signed PMU firmware support for GM20B
(Tegra X1). This PMU code will also be used as a basis for dGPU signed
PMU firmware support.
With the PMU code, the refactoring of secure boot should also make
more sense.
ACR (secure boot) support is now separated by the driver version it
originates from. This separation allows to run any version of the ACR
on any chip,
2016 Oct 27
15
[PATCH v2 00/14] Secure Boot refactoring
This is a rework of the secure boot code that moves the building of the blob
into its own set of source files (and own hooks), making the code more flexible
and (hopefully) easier to understand as well.
This rework is needed to support more signed firmware for existing and new
chips. Since the firmwares in question are not available yet I cannot send the
code to manage then, but hopefully the
2023 Feb 20
2
[PATCH vhost 01/10] virtio_ring: split: refactor virtqueue_add_split() for premapped
...unsigned int out_sgs,
> + void *data,
> + void *ctx,
> + gfp_t gfp,
> + struct vring_desc **pdesc)
> +{
> + struct vring_desc *desc;
> + unsigned int descs_used;
>
> BUG_ON(data == NULL);
> BUG_ON(ctx && vq->indirect);
>
> if (unlikely(vq->broken)) {
> - END_USE(vq);
> return -EIO;
>...
2016 Oct 11
10
[PATCH 0/8] Secure Boot refactoring
Hi everyone,
Apologies for the big patchset. This is a rework of the secure boot code that
moves the building of the blob into its own set of source files (and own hooks),
making the code more flexible and (hopefully) easier to understand as well.
This rework is needed to support more signed firmware for existing and new
chips. Since the firmwares in question are not available yet I cannot send
2016 Feb 24
0
[PATCH v3 10/11] secboot/gm200: add secure-boot support
...boot state to use for base addresses
+ *
+ * Populate the DMEM BL descriptor with the information contained in a
+ * ls_ucode_desc.
+ *
+ */
+static void
+ls_ucode_img_populate_bl_desc(struct ls_ucode_img *img, u64 wpr_addr,
+ struct gm200_flcn_bl_desc *desc)
+{
+ struct ls_ucode_img_desc *pdesc = &img->ucode_desc;
+ u64 addr_base;
+
+ addr_base = wpr_addr + img->lsb_header.ucode_off +
+ pdesc->app_start_offset;
+
+ memset(desc, 0, sizeof(*desc));
+ desc->ctx_dma = FALCON_DMAIDX_UCODE;
+ desc->code_dma_base.lo = lower_32_bits(
+ (addr_base + pdesc->app_resident_...
2018 Feb 04
5
[PATCH 0/3] OpenUPS updates
Hi,
I've been checking out NUT with an OpenUPS board over the last couple
of weekends, and have noticed that it doesn't seem to report sensible
values. This lead me to investigate usbhid-ups and delve into various
issues.
As mentioned in a github issue, one of the problems is with the report
descriptor - dumping this from the usbhid-ups debug output and picking
through it reveals that
2007 Aug 23
1
[nut-commits] svn commit r1073 - in trunk: . drivers
...{
> + if (*mode == MODE_REOPEN) {
> upsdebugx(4, "Device reopened successfully");
> return hd;
> }
> @@ -632,6 +683,7 @@
> upsdebug_hex(3, "Report Descriptor", ReportDesc, ReportSize);
>
> /* Parse Report Descriptor */
> + Free_ReportDesc(pDesc);
> pDesc = Parse_ReportDesc(ReportDesc, ReportSize);
> if (!pDesc) {
> HIDCloseDevice(*udevp);
> @@ -639,6 +691,7 @@
> }
>
> /* prepare report buffer */
> + free_report_buffer(rbuf);
> rbuf = new_report_buffer(pDesc);
> if (!rbuf) {
> Free_Repor...
2016 Jan 18
6
[PATCH v2 0/5] nouveau: add secure boot support for dGPU and Tegra
This is a highly changed revision of the first patch series that adds secure
boot support to Nouveau. This code still depends on NVIDIA releasing official
firmware files, but the files released with SHIELD TV and Pixel C can already
be used on a Jetson TX1.
As you know we are working hard to release the official firmware files, however
in the meantime it doesn't hurt to review the code so it
2023 Feb 14
11
[PATCH vhost 00/10] virtio core prepares for AF_XDP
XDP socket(AF_XDP) is an excellent bypass kernel network framework. The zero
copy feature of xsk (XDP socket) needs to be supported by the driver. The
performance of zero copy is very good.
ENV: Qemu with vhost.
vhost cpu | Guest APP CPU |Guest Softirq CPU | PPS
-----------------------------|---------------|------------------|------------
xmit by sockperf: 90% | 100%
2016 Feb 24
11
[PATCH v3 00/11] nouveau: add secure boot support for dGPU and Tegra
New version of the secure boot code that works with the blobs just merged into
linux-firmware. Since the required Mesa patches are also merged, this set is
the last piece of the puzzle to get out-of-the-box accelerated Maxwell 2.
The basic code remains the same, with a few improvements with respect to how
secure falcons are started. Hopefully the patchset is better split too.
I have a
2008 Feb 25
1
[Fwd: Re: [Fwd: Update to 2.2.1-2]]
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2016 Aug 26
32
[PATCH v8 00/18] Add support for FDMA DMA controller and slim core rproc found on STi chipsets
Hi Vinod, Bjorn, Patrice,
This patchset adds support for the Flexible Direct Memory Access (FDMA) core
found on STi chipsets from STMicroelectronics. The FDMA is a slim core CPU
with a dedicated firmware. It is a general purpose DMA controller supporting
16 independent channels and data can be moved from memory to memory or between
memory and paced latency critical real time targets.
After quite
2016 Aug 26
32
[PATCH v8 00/18] Add support for FDMA DMA controller and slim core rproc found on STi chipsets
Hi Vinod, Bjorn, Patrice,
This patchset adds support for the Flexible Direct Memory Access (FDMA) core
found on STi chipsets from STMicroelectronics. The FDMA is a slim core CPU
with a dedicated firmware. It is a general purpose DMA controller supporting
16 independent channels and data can be moved from memory to memory or between
memory and paced latency critical real time targets.
After quite
2010 Sep 18
0
Wine release 1.3.3
...nsform_projection().
wined3d: Don't overwrite the offscreen depth/stencil surface with undefined data in surface_load_ds_location().
d3d8: An invalid shader version isn't an internal error.
wined3d: Avoid a memcpy() in IWineD3DImpl_FillGLCaps().
wined3d: Rename "pDesc" to "desc".
wined3d: Getting the current vertex shader should never fail.
wined3d: Getting the current pixel shader should never fail.
wined3d: GL_DRAW_FRAMEBUFFER depends on either ARB_framebuffer_object or EXT_framebuffer_blit.
wined3d: IWineD3DSurface_GetDe...