search for: pcie_type

...1260,37 @@ void pci_pm_init(struct pci_dev *dev) } } +/** + * pci_ari_init - turn on ARI forwarding if it's supported + * @dev: the PCI device + */ +void pci_ari_init(struct pci_dev *dev) +{ + int pos; + u32 cap; + u16 ctrl; + + if (!dev->is_pcie || (dev->pcie_type != PCI_EXP_TYPE_ROOT_PORT && + dev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM)) + return; + + pos = pci_find_capability(dev, PCI_CAP_ID_EXP); + if (!pos) + return; + + pci_read_config_dword(dev, pos + PCI_EXP_DEVCAP2,...

...1260,37 @@ void pci_pm_init(struct pci_dev *dev) } } +/** + * pci_ari_init - turn on ARI forwarding if it's supported + * @dev: the PCI device + */ +void pci_ari_init(struct pci_dev *dev) +{ + int pos; + u32 cap; + u16 ctrl; + + if (!dev->is_pcie || (dev->pcie_type != PCI_EXP_TYPE_ROOT_PORT && + dev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM)) + return; + + pos = pci_find_capability(dev, PCI_CAP_ID_EXP); + if (!pos) + return; + + pci_read_config_dword(dev, pos + PCI_EXP_DEVCAP2,...

...rnative Routing-ID Interpretation capability support. + */ + +#include <linux/pci.h> + +#include "pci.h" + +/** + * pci_ari_enable_fwd - enable ARI forwarding + * @dev: PCI device + */ +void pci_ari_enable_fwd(struct pci_dev *dev) +{ + int pos; + u32 cap; + u16 ctrl; + + if (dev->pcie_type != PCI_EXP_TYPE_ROOT_PORT && + dev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM) + return; + + pos = pci_find_capability(dev, PCI_CAP_ID_EXP); + if (!pos) + return; + + pci_read_config_dword(dev, pos + PCI_EXP_DEVCAP2, &cap); + + if (!(cap & PCI_EXP_DEVCAP2_ARI)) + return; + + de...

...rnative Routing-ID Interpretation capability support. + */ + +#include <linux/pci.h> + +#include "pci.h" + +/** + * pci_ari_enable_fwd - enable ARI forwarding + * @dev: PCI device + */ +void pci_ari_enable_fwd(struct pci_dev *dev) +{ + int pos; + u32 cap; + u16 ctrl; + + if (dev->pcie_type != PCI_EXP_TYPE_ROOT_PORT && + dev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM) + return; + + pos = pci_find_capability(dev, PCI_CAP_ID_EXP); + if (!pos) + return; + + pci_read_config_dword(dev, pos + PCI_EXP_DEVCAP2, &cap); + + if (!(cap & PCI_EXP_DEVCAP2_ARI)) + return; + + de...

...rnative Routing-ID Interpretation capability support. + */ + +#include <linux/pci.h> + +#include "pci.h" + +/** + * pci_ari_enable_fwd - enable ARI forwarding + * @dev: PCI device + */ +void pci_ari_enable_fwd(struct pci_dev *dev) +{ + int pos; + u32 cap; + u16 ctrl; + + if (dev->pcie_type != PCI_EXP_TYPE_ROOT_PORT && + dev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM) + return; + + pos = pci_find_capability(dev, PCI_CAP_ID_EXP); + if (!pos) + return; + + pci_read_config_dword(dev, pos + PCI_EXP_DEVCAP2, &cap); + + if (!(cap & PCI_EXP_DEVCAP2_ARI)) + return; + + de...

...ive Routing-ID Interpretation capability support. + */ + +#include <linux/pci.h> + +#include "pci.h" + +/** + * pci_ari_enable_fwd - enable ARI forwarding + * @dev: the PCI device + */ +void pci_ari_enable_fwd(struct pci_dev *dev) +{ + int pos; + u32 cap; + u16 ctrl; + + if (dev->pcie_type != PCI_EXP_TYPE_ROOT_PORT && + dev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM && + dev->ari_enabled) + return; + + pos = pci_find_capability(dev, PCI_CAP_ID_EXP); + if (!pos) + return; + + pci_read_config_dword(dev, pos + PCI_EXP_DEVCAP2, &cap); + + if (!(cap & PC...

...ive Routing-ID Interpretation capability support. + */ + +#include <linux/pci.h> + +#include "pci.h" + +/** + * pci_ari_enable_fwd - enable ARI forwarding + * @dev: the PCI device + */ +void pci_ari_enable_fwd(struct pci_dev *dev) +{ + int pos; + u32 cap; + u16 ctrl; + + if (dev->pcie_type != PCI_EXP_TYPE_ROOT_PORT && + dev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM && + dev->ari_enabled) + return; + + pos = pci_find_capability(dev, PCI_CAP_ID_EXP); + if (!pos) + return; + + pci_read_config_dword(dev, pos + PCI_EXP_DEVCAP2, &cap); + + if (!(cap & PC...

...ive Routing-ID Interpretation capability support. + */ + +#include <linux/pci.h> + +#include "pci.h" + +/** + * pci_ari_enable_fwd - enable ARI forwarding + * @dev: the PCI device + */ +void pci_ari_enable_fwd(struct pci_dev *dev) +{ + int pos; + u32 cap; + u16 ctrl; + + if (dev->pcie_type != PCI_EXP_TYPE_ROOT_PORT && + dev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM && + dev->ari_enabled) + return; + + pos = pci_find_capability(dev, PCI_CAP_ID_EXP); + if (!pos) + return; + + pci_read_config_dword(dev, pos + PCI_EXP_DEVCAP2, &cap); + + if (!(cap & PC...

...tifunction = 0; + new->vendor = dev->vendor; + pci_read_config_word(dev, dev->iov->cap + PCI_IOV_VF_DID, &new->device); + new->cfg_size = PCI_CFG_SPACE_EXP_SIZE; + new->error_state = pci_channel_io_normal; + new->is_pcie = 1; + new->pcie_type = PCI_EXP_TYPE_ENDPOINT; + new->dma_mask = 0xffffffff; + + dev_set_name(&new->dev, "%04x:%02x:%02x.%d", pci_domain_nr(bus), + busnr, PCI_SLOT(devfn), PCI_FUNC(devfn)); + + pci_read_config_byte(new, PCI_REVISION_ID, &new->revision); +...

...tifunction = 0; + new->vendor = dev->vendor; + pci_read_config_word(dev, dev->iov->cap + PCI_IOV_VF_DID, &new->device); + new->cfg_size = PCI_CFG_SPACE_EXP_SIZE; + new->error_state = pci_channel_io_normal; + new->is_pcie = 1; + new->pcie_type = PCI_EXP_TYPE_ENDPOINT; + new->dma_mask = 0xffffffff; + + dev_set_name(&new->dev, "%04x:%02x:%02x.%d", pci_domain_nr(bus), + busnr, PCI_SLOT(devfn), PCI_FUNC(devfn)); + + pci_read_config_byte(new, PCI_REVISION_ID, &new->revision); +...

...>devfn = devfn; + new->hdr_type = PCI_HEADER_TYPE_NORMAL; + new->multifunction = 0; + new->vendor = dev->vendor; + pci_read_config_word(dev, dev->iov->cap + PCI_IOV_VF_DID, &new->device); + new->cfg_size = 4096; + new->error_state = pci_channel_io_normal; + new->pcie_type = PCI_EXP_TYPE_ENDPOINT; + new->dma_mask = 0xffffffff; + + dev_set_name(&new->dev, "%04x:%02x:%02x.%d", pci_domain_nr(bus), + busnr, PCI_SLOT(devfn), PCI_FUNC(devfn)); + + pci_read_config_byte(new, PCI_REVISION_ID, &new->revision); + new->class = dev->class; +...

...>devfn = devfn; + new->hdr_type = PCI_HEADER_TYPE_NORMAL; + new->multifunction = 0; + new->vendor = dev->vendor; + pci_read_config_word(dev, dev->iov->cap + PCI_IOV_VF_DID, &new->device); + new->cfg_size = 4096; + new->error_state = pci_channel_io_normal; + new->pcie_type = PCI_EXP_TYPE_ENDPOINT; + new->dma_mask = 0xffffffff; + + dev_set_name(&new->dev, "%04x:%02x:%02x.%d", pci_domain_nr(bus), + busnr, PCI_SLOT(devfn), PCI_FUNC(devfn)); + + pci_read_config_byte(new, PCI_REVISION_ID, &new->revision); + new->class = dev->class; +...

...>devfn = devfn; + new->hdr_type = PCI_HEADER_TYPE_NORMAL; + new->multifunction = 0; + new->vendor = dev->vendor; + pci_read_config_word(dev, dev->iov->cap + PCI_IOV_VF_DID, &new->device); + new->cfg_size = 4096; + new->error_state = pci_channel_io_normal; + new->pcie_type = PCI_EXP_TYPE_ENDPOINT; + new->dma_mask = 0xffffffff; + + dev_set_name(&new->dev, "%04x:%02x:%02x.%d", pci_domain_nr(bus), + busnr, PCI_SLOT(devfn), PCI_FUNC(devfn)); + + pci_read_config_byte(new, PCI_REVISION_ID, &new->revision); + new->class = dev->class; +...

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. [PATCH 1/8 v4] PCI: define PCI resource names in a 'enum' [PATCH 2/8 v4] PCI: export __pci_read_base

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. [PATCH 1/8 v4] PCI: define PCI resource names in a 'enum' [PATCH 2/8 v4] PCI: export __pci_read_base

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. The Physical Function and Virtual Function drivers using the SR-IOV APIs will come soon! Major changes from

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. The Physical Function and Virtual Function drivers using the SR-IOV APIs will come soon! Major changes from

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. The Physical Function and Virtual Function drivers using the SR-IOV APIs will come soon! Major changes from

...t;dev.parent; + vf->dev.bus = pf->dev.bus; + vf->devfn = devfn; + vf->hdr_type = PCI_HEADER_TYPE_NORMAL; + vf->multifunction = 0; + vf->vendor = pf->vendor; + vf->device = pf->iov->device; + vf->cfg_size = 4096; + vf->error_state = pci_channel_io_normal; + vf->pcie_type = PCI_EXP_TYPE_ENDPOINT; + vf->dma_mask = 0xffffffff; + + dev_set_name(&vf->dev, "%04x:%02x:%02x.%d", pci_domain_nr(pb), bus, + PCI_SLOT(devfn), PCI_FUNC(devfn)); + + pci_read_config_byte(vf, PCI_REVISION_ID, &vf->revision); + vf->class = pf->class; + vf->c...

...t;dev.parent; + vf->dev.bus = pf->dev.bus; + vf->devfn = devfn; + vf->hdr_type = PCI_HEADER_TYPE_NORMAL; + vf->multifunction = 0; + vf->vendor = pf->vendor; + vf->device = pf->iov->device; + vf->cfg_size = 4096; + vf->error_state = pci_channel_io_normal; + vf->pcie_type = PCI_EXP_TYPE_ENDPOINT; + vf->dma_mask = 0xffffffff; + + dev_set_name(&vf->dev, "%04x:%02x:%02x.%d", pci_domain_nr(pb), bus, + PCI_SLOT(devfn), PCI_FUNC(devfn)); + + pci_read_config_byte(vf, PCI_REVISION_ID, &vf->revision); + vf->class = pf->class; + vf->c...